High-k Dielectrics and Metal Gates for Future Generation Memory Devices

被引:11
|
作者
Kittl, J. A. [1 ]
Opsomer, K. [1 ]
Popovici, M. [1 ]
Menou, N. [1 ]
Kaczer, B. [1 ]
Wang, X. P. [1 ]
Adelmann, C. [1 ]
Pawlak, M. A. [1 ]
Tomida, K. [1 ]
Rothschild, A. [1 ]
Govoreanu, B. [1 ]
Degraeve, R. [1 ]
Schaekers, M. [1 ]
Zahid, M. [1 ]
Delabie, A. [1 ]
Meersschaut, J. [1 ]
Polspoel, W. [1 ]
Clima, S. [1 ]
Pourtois, G. [1 ]
Knaepen, W.
Detavernier, C.
Afanas'ev, V. V. [2 ]
Blomberg, T. [3 ]
Pierreux, D. [4 ]
Swerts, J. [4 ]
Fischer, P. [4 ]
Maes, J. W. [4 ]
Manger, D. [5 ]
Vandervorst, W. [1 ]
Conard, T. [1 ]
Franquet, A. [1 ]
Favia, P. [1 ]
Bender, H. [1 ]
Brijs, B. [1 ]
Van Elshocht, S. [1 ]
Jurczak, M. [1 ]
Van Houdt, J. [1 ]
Wouters, D. J. [1 ]
机构
[1] IMEC, Louvain, Belgium
[2] Katholieke Univ Leuven, Leuven, Belgium
[3] ASM Microchem, Helsinki, Finland
[4] ASM Belgium, Leuven, Belgium
[5] Qimonda, Leuven, Belgium
关键词
RANDOM-ACCESS MEMORY; (BA; SR)TIO3; THIN-FILMS; SRTIO3; DEPOSITION; LAYER;
D O I
10.1149/1.3118928
中图分类号
O646 [电化学、电解、磁化学];
学科分类号
081704 ;
摘要
The requirements and development of high-k dielectric films for application in storage cells of future generation flash and Dynamic Random Access Memory (DRAM) devices are reviewed. Dielectrics with k-value in the 9-30 range are studied as insulators between charge storage layers and control gates in flash devices. For this application, large band gaps (> 6 eV) and band offsets are required, as well as low trap densities. Materials studied include aluminates and scandates. For DRAM metal-insulator-metal (MIM) capacitors, aggressive scaling of the equivalent oxide thickness (with targets down to 0.3 nm) drives the research towards dielectrics with k-values > 50. Due to the high aspect ratio of MIMCap structures, highly conformal deposition techniques are needed, triggering a substantial effort to develop Atomic Layer Deposition (ALD) processes for the deposition of metal gates and high-k dielectrics. Materials studied include Sr and Ba-based perovskites, with SrTiO3 as one of the most promising candidates, as well as tantalates, titanates and niobates.
引用
收藏
页码:29 / +
页数:3
相关论文
共 50 条
  • [1] High-k dielectrics for future generation memory devices (Invited Paper)
    Kittl, J. A.
    Opsomer, K.
    Popovici, M.
    Menou, N.
    Kaczer, B.
    Wang, X. P.
    Adelmann, C.
    Pawlak, M. A.
    Tomida, K.
    Rothschild, A.
    Govoreanu, B.
    Degraeve, R.
    Schaekers, M.
    Zahid, M.
    Delabie, A.
    Meersschaut, J.
    Polspoel, W.
    Clima, S.
    Pourtois, G.
    Knaepen, W.
    Detavernier, C.
    Afanas'ev, V. V.
    Blomberg, T.
    Pierreux, D.
    Swerts, J.
    Fischer, P.
    Maes, J. W.
    Manger, D.
    Vandervorst, W.
    Conard, T.
    Franquet, A.
    Favia, P.
    Bender, H.
    Brijs, B.
    Van Elshocht, S.
    Jurczak, M.
    Van Houdt, J.
    Wouters, D. J.
    MICROELECTRONIC ENGINEERING, 2009, 86 (7-9) : 1789 - 1795
  • [2] Meeting the future challenges of high-k gate dielectrics and metal gates
    Snoeckx, Koen
    Deweerd, Wirn
    Delabie, Annelies
    Van Elshocht, Sven
    De Gendt, Stefan
    MICRO, 2006, 24 (02): : 27 - +
  • [3] Developing a systematic approach to metal gates and high-k dielectrics in future-generation CMOS
    Majhi, Prashant
    Wen, Huang-Chun
    Alshareef, Husam
    Harris, H. Rusty
    Luan, Hongfa
    Choi, Kisik
    Park, C. S.
    Song, Seung-Chul
    Lee, Byoung Hun
    Jammy, Raj
    MICRO, 2006, 24 (04): : 25 - 32
  • [4] Integrating high-k dielectrics:: etched polysilicon or metal gates?
    Schram, T
    Beckx, S
    De Gendt, S
    Vertommen, J
    Lee, S
    SOLID STATE TECHNOLOGY, 2003, 46 (06) : 61 - +
  • [5] Mist deposited high-k dielectrics for next generation MOS gates
    Lee, DO
    Roman, P
    Wu, CT
    Mumbauer, P
    Brubaker, M
    Grant, R
    Ruzyllo, J
    SOLID-STATE ELECTRONICS, 2002, 46 (11) : 1671 - 1677
  • [6] The past, present and future of high-k/metal gates
    Choi, Kisik
    Ando, Takashi
    Cartier, Eduard
    Kerber, Andreas
    Paruchuri, Vamsi
    Iacoponi, John
    Narayanan, Vijay
    SILICON COMPATIBLE MATERIALS, PROCESSES, AND TECHNOLOGIES FOR ADVANCED INTEGRATED CIRCUITS AND EMERGING APPLICATIONS 3, 2013, 53 (03): : 17 - 26
  • [7] High-k/Metal Gates in Leading Edge Silicon Devices
    James, Dick
    2012 23RD ANNUAL SEMI ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE (ASMC), 2012, : 346 - 353
  • [8] High-k dielectrics and dual metal gates: Integration issues for new CMOS materials
    Claflin, B
    Flock, K
    Lucovsky, G
    ULTRATHIN SIO2 AND HIGH-K MATERIALS FOR ULSI GATE DIELECTRICS, 1999, 567 : 603 - 608
  • [9] Studies of mist deposited high-k dielectrics for MOS gates
    Lee, DO
    Roman, P
    Wu, CT
    Mahoney, W
    Horn, M
    Mumbauer, P
    Brubaker, M
    Grant, R
    Ruzyllo, J
    MICROELECTRONIC ENGINEERING, 2001, 59 (1-4) : 405 - 408
  • [10] Investigation of Zirconium Oxide Based High-k Dielectrics for Future Memory Applications
    Grube, Matthias
    Martin, Dominik
    Weber, Walter M.
    Bierwagen, Oliver
    Geelhaar, Lutz
    Riechert, Henning
    2009 3RD INTERNATIONAL CONFERENCE ON SIGNALS, CIRCUITS AND SYSTEMS (SCS 2009), 2009, : 135 - +