Log-domain allpass group-delay equaliser design with XFILTER

被引：0
|
作者：
Ng, AEJ [1 ]
Sewell, JI [1 ]
机构：
[1] Univ Glasgow, Dept Elect & Elect Engn, Glasgow G12 8LT, Lanark, Scotland
来源：
ICES 2002: 9TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS I-111, CONFERENCE PROCEEDINGS | 2002年
关键词：
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
Synthesis procedures for log-domain ladder and cascade-biquad allpass group-delay equalisers are presented. The ladder equalisers are based on operationally simulating passive driving-point admittance prototypes using matrix methods. From these, biquadratic and first order log-domain allpass sections are derived. These synthesis procedures have been implemented in the design software XFILTER.
引用
收藏
页码：125 / 128
页数：4
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