Novel structures of 3.3kV 4H-SiC BJTs to reduce the Stacking Faults expansion

被引：0

作者：

Brosselard, P. ^{[1
]}

Tournier, D. ^{[1
]}

Banu, V. ^{[2
]}

Jorda, X. ^{[2
]}

Godignon, P. ^{[2
]}

Millan, J. ^{[2
]}

Bano, E. ^{[3
]}

机构：

[1] Inst Natl Sci Appl, Lab AMPERE, 20 Av Albert Einstein, F-69621 Villeurbanne, France

[2] CSIC, Ctr Nacl Microelect, E-08193 Barcelona, Spain

[3] ENSERG, IMEP, F-08193 Grenoble, France

来源：

2009 21ST INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & ICS | 2009年

关键词：

D O I：

10.1109/ISPSD.2009.5158055

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

4H-SiC BJTs have been manufactured on a Norstel epitaxied N+/P/N-/N+ substrate with a combination of mesa and JTE as edge termination. A breakdown voltage of 3.3 kV has been measured at 1 mu A regardless the active area (0.16 and 1.4 mm(2)). A current gain of 20 was extracted at 10V-25 degrees C. 70% of the BJTs did not exhibit a current shift, after a 50 hours DC-stress (25 degrees C).

引用

页码：275 / +

页数：2

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