Physics based model for potential distribution and threshold voltage of gate-all-around tunnel field effect transistor (GAA-TFET)

被引:2
|
作者
Usha, C. [1 ]
Vimala, P. [1 ]
Ramakrishnan, V. N. [2 ]
机构
[1] Dayananda Sagar Coll Engn, Dept Elect & Commun, Bangalore 560078, Karnataka, India
[2] Vellore Inst Technol, Dept Elect & Commun, Vellore 632014, Tamil Nadu, India
关键词
Tunnel field effect transistor; Surface potential; Threshold voltage; Threshold voltage roll off; Drain current; TCAD Simulation; FET; DESIGN;
D O I
10.1016/j.matpr.2020.10.946
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
In this paper, we propose physics based modeling for p-type surrounding gate TFET with single material gate. The surface potential is modeled from 2-D Poisson's equation using Parabolic Approximation method. From the surface potential equation threshold voltage, threshold voltage roll off, drain current and Subthreshold Swing is modeled. The simulation of the model provides the threshold of 0.4 V, threshold voltage roll off less than 0.1 and Subthreshold Swing of 41 mV/dec. The model is validated using ATLAS TCAD Simulation Tool. (C) 2019 Elsevier Ltd. All rights reserved. Selection and Peer-review under responsibility of the scientific committee of the 2nd International Conference on Nanoscience and Nanotechnology.
引用
收藏
页码:4052 / 4057
页数:6
相关论文
共 50 条
  • [21] Benchmarking Performance of a Gate-All-Around Germanium Nanotube Field Effect Transistor (GAA-GeNTFET) against GAA-CNTFET
    Bayani, Amir Hossein
    Dideban, Daryoosh
    Akbarzadeh, Mojtaba
    Moezi, Negin
    ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY, 2017, 6 (04) : M24 - M28
  • [22] Potential and Quantum Threshold Voltage Modeling of Gate-All-Around Nanowire MOSFETs
    Pandian, M.
    Balamurugan, N.
    Pricilla, A.
    ACTIVE AND PASSIVE ELECTRONIC COMPONENTS, 2013, 2013 (2013)
  • [23] Simulation of Gate-All-Around Tunnel Field-Effect Transistor with an n-Doped Layer
    Lee, Dong Seup
    Yang, Hong-Seon
    Kang, Kwon-Chil
    Lee, Joung-Eob
    Lee, Jung Han
    Cho, Seongjae
    Park, Byung-Gook
    IEICE TRANSACTIONS ON ELECTRONICS, 2010, E93C (05) : 540 - 545
  • [24] Low-temperature (cryogenic) Transport in Gate-All-Around (GAA) Silicon Nanowire Field-Effect Transistor
    Verma, Amit
    Nekovei, Reza
    Shiri, Daryoush
    2024 IEEE 24TH INTERNATIONAL CONFERENCE ON NANOTECHNOLOGY, NANO 2024, 2024, : 122 - 125
  • [25] Analysis of Channel Area Fluctuation Effects of Gate-All-Around Tunnel Field-Effect Transistor
    Kang, Seok Jung
    Park, Jeong-Uk
    Rim, KyungJin
    Kim, Yoon
    Kim, Jang Hyun
    Kim, Garam
    Kim, Sangwan
    JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, 2020, 20 (07) : 4409 - 4413
  • [26] Design of a gate-all-around arch-shaped tunnel-field-effect-transistor-based capacitorless DRAM
    Bae, Seung Ji
    Lee, Sang Ho
    Park, Jin
    Kim, Min Seok
    Hong, Jeong Woo
    Koh, Won Suk
    Yun, Gang San
    Jang, Jaewon
    Bae, Jin-Hyuk
    Kang, In Man
    DISCOVER NANO, 2025, 20 (01)
  • [27] Magnetic Field Effect on Threshold Voltage for Ultrathin Silicon Gate-All-Around Nanowire Field-Effect-Transistors
    Abdelhamid, Hamdy
    Anis, Azza M.
    Aboulwafa, Mohamed E.
    Eladawy, Mohamed I.
    SILICON, 2020, 12 (01) : 49 - 57
  • [28] Magnetic Field Effect on Threshold Voltage for Ultrathin Silicon Gate-All-Around Nanowire Field-Effect-Transistors
    Hamdy Abdelhamid
    Azza M. Anis
    Mohamed E. Aboulwafa
    Mohamed I. Eladawy
    Silicon, 2020, 12 : 49 - 57
  • [29] Quantum Modelling of Nanoscale Silicon Gate-all-Around Field Effect Transistor
    Vimala, P.
    Kumar, Nithin N. R.
    JOURNAL OF NANO RESEARCH, 2020, 64 : 115 - 122
  • [30] Design and performance analysis of gate-all-around negative capacitance dopingless nanowire tunnel field effect transistor
    Solay, Leo Raj
    Kumar, Naveen
    Amin, S. Intekhab
    Kumar, Pradeep
    Anand, Sunny
    SEMICONDUCTOR SCIENCE AND TECHNOLOGY, 2022, 37 (11)