A Parallel Solver to the Three-Level VSC Modeling for HIL Application

被引：0
|
作者：
Liu, Chen [1 ]
Ma, Rui [1 ]
Bai, Hao [1 ]
Gecther, Franck [1 ]
Gao, Fei [1 ]
机构：
[1] Univ Bourgogne Franche Comte, UTBM, Energy Dept, FEMTO ST,CNRS,UMR 6174, Besancon, France
来源：
2018 IEEE TRANSPORTATION AND ELECTRIFICATION CONFERENCE AND EXPO (ITEC) | 2018年
基金：
欧盟地平线“2020”;
关键词：
FPGA; Parallel Calculation; Diode-clamped three level voltage source Converter; HIL; FlexRIO; REAL-TIME SIMULATION; POWER CONVERTERS;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents enhanced parallel field programmable gate array (FPGA) architecture for solving the model of diode-clamped three-level voltage source converter (VSC). The simulator is intended for the testing evaluation of digital control based on the hardware-in-the-loop (HIL) concept. The philosophies of the proposed implementation are: 1) it enables to the use of simulation as low as 40 nanoseconds, 2) it can provide a fixed timeline for the whole system execution; 3) it effectively utilize the parallel architecture in the FPGA. The implementation results in the National Instruments FlexRIO PXIe-7975 platform are compared with offline simulation in Matlab. The results show high accuracy of the modeling approach.
引用
收藏
页码：108 / 113
页数：6
相关论文
共 50 条
  • [31] Simulation Research of Offshore Wind Farm VSC-HVDC Three-Level Converters for Grid Integration
    Mao, Zewei
    Xu, Xianglian
    Li, Jialiang
    Yu, Shiwen
    Geng, Hao
    9TH INTERNATIONAL CONFERENCE ON AMBIENT SYSTEMS, NETWORKS AND TECHNOLOGIES (ANT 2018) / THE 8TH INTERNATIONAL CONFERENCE ON SUSTAINABLE ENERGY INFORMATION TECHNOLOGY (SEIT-2018) / AFFILIATED WORKSHOPS, 2018, 130 : 1146 - 1151
  • [32] Introduction and application of three-level design pattern for DIS software
    Yang, Xue-Rong
    Liang, Jia-Hong
    Feng, Xiang-Jun
    Liao, Ying
    Xitong Fangzhen Xuebao / Journal of System Simulation, 2008, 20 (21): : 5812 - 5815
  • [33] A three-level converter and its application to power factor correction
    Barbosa, PA
    Canales, F
    Burdío, JA
    Lee, FC
    IEEE TRANSACTIONS ON POWER ELECTRONICS, 2005, 20 (06) : 1319 - 1327
  • [34] Application of three-level dependent degree for transformer fault diagnosis
    Deng, Hong-Gui
    Luo, An
    Cao, Jian
    Cao, Xiang
    Dianli Xitong Zidonghua/Automation of Electric Power Systems, 2005, 29 (18): : 73 - 75
  • [35] Modeling and Suppression of Circulating Currents Among Parallel Single-Phase Three-Level Grid-Tied Inverters
    Zhang, Chenghui
    Wang, Zhizhen
    Xing, Xiangyang
    Li, Xiaoyan
    Liu, Xi
    IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2022, 69 (12) : 12967 - 12979
  • [36] An Improved Modulation Method for Parallel Three-Level Rectifiers With Circulating Current Mitigation
    Li, Yanfeng
    Zhang, Hongliang
    Jing, Xiao
    Zhao, Aiguang
    IEEE ACCESS, 2023, 11 : 28715 - 28723
  • [37] Three-level parallel high speed architecture for EBCOT in JPEG2000
    Li, YJ
    Bayoumi, M
    2005 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH, AND SIGNAL PROCESSING, VOLS 1-5: SPEECH PROCESSING, 2005, : 5 - 8
  • [38] Three-level BDDC in three dimensions
    Tu, Xuemin
    SIAM JOURNAL ON SCIENTIFIC COMPUTING, 2007, 29 (04): : 1759 - 1780
  • [39] Parallel Three-Level Converter with Less Ripple Current and Balance Output Current
    Lin, Bor-Ren
    Liu, Wei-Po
    Dai, Jheng-Jie
    Wang, Chien-Ming
    PROCEEDINGS OF THE 2017 12TH IEEE CONFERENCE ON INDUSTRIAL ELECTRONICS AND APPLICATIONS (ICIEA), 2017, : 1074 - 1078
  • [40] A new three-level CMFD method based on the loosely coupled parallel strategy
    Liu, Zhouyu
    Zhou, Xinyu
    Cao, Liangzhi
    Wu, Hongchun
    ANNALS OF NUCLEAR ENERGY, 2020, 145
12345