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- [31] Effect of board-level reflow on adhesion between lead-free solder and underfill in flip-chip BGA packages PROCEEDINGS OF THE ASME INTERNATIONAL MECHANICAL ENGINEERING CONGRESS AND EXPOSITION 2007, VOL 5: ELECTRONICS AND PHOTONICS, 2008, : 9 - 14
- [34] A New Methodology for Board-Level Harmonic Analysis of Multi-Level Packages 2012 IEEE 62ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2012, : 1840 - 1845
- [35] Improved reliability with underfilled area array packages POLYTRONIC 2001, PROCEEDINGS, 2001, : 124 - 129
- [37] Transient submodeling analysis for board-level drop tests of electronic packages IEEE TRANSACTIONS ON ELECTRONICS PACKAGING MANUFACTURING, 2007, 30 (01): : 54 - 62
- [38] On the JEDEC Board Level Drop Test Simulation of Array of BGA Packages 2022 IEEE 39TH INTERNATIONAL ELECTRONICS MANUFACTURING TECHNOLOGY CONFERENCE (IEMT), 2022,
- [40] Board level reliability of chip scale packages 1999 INTERNATIONAL SYMPOSIUM ON MICROELECTRONICS, PROCEEDINGS, 1999, 3906 : 571 - 580