Initialization-Based Test Pattern Generation for Asynchronous Circuits

被引：6
|
作者：
Efthymiou, Aristides [1 ]
机构：
[1] Univ Edinburgh, Sch Informat, Edinburgh EH8 9AB, Midlothian, Scotland
来源：
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | 2010年 / 18卷 / 04期
基金：
英国工程与自然科学研究理事会;
关键词：
Asynchronous circuits; automatic test pattern generation (ATPG); sequential initialization; stuck-at fault testing; TESTABILITY;
D O I：
10.1109/TVLSI.2009.2013470
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A novel test pattern generation method for asynchronous circuits is described and evaluated in detail. The method combines conventional pattern generation with hazard-free state initialization. Any type of asynchronous circuit can be processed, and all stuck-at faults, even those inside state-holding elements, such as C-elements, are considered. The results on some of the largest benchmarks ever used for asynchronous circuit testing show fault coverage on the order of 99% with no area overhead for (quasi-) delay-insensitive datapath circuits.
引用
收藏
页码：591 / 601
页数：11
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