FPGA Based Design and HIL Verification of a Soft-Core Directional-OCR

In the conventional distribution network mostly overcurrent (OCR) relays are in use, however, in case of microgrid the direction of power changes with operating conditions, the need of directional feature of the relay has become a must. Therefore, in this article, the design and hardware prototype of a soft-core directional-OCR (DOCR) on Field Programable Gate Array (FPGA) using a modular design approach is presented. A digital phase detection module has been developed for the estimation of the direction of current flowing through the power system network. A parallel architecture for phase and tripping time computation is used in the proposed design that makes the developed relay faster by reducing the computation time of the algorithm. The Integer arithmetic Verilog hardware description language platform is used to optimize the computational burden and hardware resources. Also, in the developed relay, inverse characteristics viz. extreme inverse and very inverse characteristics of OCR are emulated. The design is implemented on the Virtex ML-505 FPGA development board. The performance of the DOCR is tested by creating the faults at different locations with different values of time dial settings and plug-point-multiplier. Hardware-in-loop verification of the relay is carried out with the real-time-digital simulator and FPGA. The results are compared with the standard DOCR of the RTDS to successfully verify the operation of the designed relay under different fault conditions.