<bold>An Optimized Design of MCU in CPU Soft-core Based on the FPGA</bold>

被引：0
|
作者：
Xing Yuhua [1 ]
Wang Ru [2 ]
机构：
[1] Xian Univ Tech, Xian 710048, Peoples R China
[2] Xian Univ Arch & Tech, Xian 710055, Peoples R China
来源：
ICEMI 2007: PROCEEDINGS OF 2007 8TH INTERNATIONAL CONFERENCE ON ELECTRONIC MEASUREMENT & INSTRUMENTS, VOL IV | 2007年
关键词：
MCU; address shift logic; verilog_HDL; FPGA;
D O I：
暂无
中图分类号：
TP39 [计算机的应用];
学科分类号：
081203 ; 0835 ;
摘要：
Through the discussion of the structure and the design process about micro-programmed control unit (MCU) in CPU soft-core. An optimized design method of next-address shift logic in MCU is presented in this paper by designing instruction operating code and arranging microinstructions storage. Some of codes using Verilog_HDL are given. Simulation result indicate that this method is practical and has reference value in designing CPU soft-core based on the FPGA.
引用
收藏
页码：947 / +
页数：2
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