New perspectives for multicore architectures using advanced technologies

被引：0

作者：

Clermidy, F. ^{[1
]}

Vivet, P. ^{[1
]}

Dutoit, D. ^{[1
]}

Thonnart, Y. ^{[1
]}

Gonzales, J. L. ^{[1
]}

Noel, J. P. ^{[1
]}

Giraud, B. ^{[1
]}

Levisse, A. ^{[1
]}

Billoint, O. ^{[1
]}

Thuries, S. ^{[1
]}

机构：

[1] Univ Grenoble Alpes, CEA, LETI, MINATEC Campus, Grenoble, France

来源：

2016 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) | 2016年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Impact of advanced technologies on the design and structure of multicore architectures is presented in this paper. More specifically, the power consumption and design complexity walls are examined leading to a "conquer-and-divide" strategy based on multicore partitioning and specialization. We then show how 3D stacking, Monolithic 3D integration and BEOL NVM can be associated to build new, simplified and power-efficient multicore.

引用

页数：4

共 50 条

[41] Parallel Subgraph Counting for Multicore Architectures
Aparicio, David
Ribeiro, Pedro
Silva, Fernando
[J]. 2014 IEEE INTERNATIONAL SYMPOSIUM ON PARALLEL AND DISTRIBUTED PROCESSING WITH APPLICATIONS (ISPA), 2014, : 34 - 41
[42] Parallel nonlinear preconditioners on multicore architectures
Vicente Galiano
Héctor Migallón
Violeta Migallón
José Penadés
[J]. The Journal of Supercomputing, 2011, 58 : 160 - 167
[43] Parallel skyline computation on multicore architectures
Im, Hyeonseung
Park, Jonghyun
Park, Sungwoo
[J]. INFORMATION SYSTEMS, 2011, 36 (04) : 808 - 823
[44] A Cache Tuning Heuristic for Multicore Architectures
Rawlins, Marisha
Gordon-Ross, Ann
[J]. IEEE TRANSACTIONS ON COMPUTERS, 2013, 62 (08) : 1570 - 1583
[45] Quantifying Thread Vulnerability for Multicore Architectures
Oz, Isil
Topcuoglu, Haluk Rahmi
Kandemir, Mahmut
Tosun, Oguz
[J]. PROCEEDINGS OF THE 19TH INTERNATIONAL EUROMICRO CONFERENCE ON PARALLEL, DISTRIBUTED, AND NETWORK-BASED PROCESSING, 2011, : 32 - 39
[46] ReDirect: Reconfigurable Directories for Multicore Architectures
Patsilaras, George
Tuck, James
[J]. ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2017, 14 (04)
[47] Program Execution on Reconfigurable Multicore Architectures
Prasad, Sanjiva
[J]. ELECTRONIC PROCEEDINGS IN THEORETICAL COMPUTER SCIENCE, 2016, (211): : 83 - 91
[48] Continuous skyline queries on multicore architectures
De Matteis, Tiziano
Di Girolamo, Salvatore
Mencagli, Gabriele
[J]. CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE, 2016, 28 (12): : 3503 - 3522
[49] Fast and Portable Locking for Multicore Architectures
Lozi, Jean-Pierre
David, Florian
Thomas, Gael
Lawall, Julia
Muller, Gilles
[J]. ACM TRANSACTIONS ON COMPUTER SYSTEMS, 2016, 33 (04):
[50] Challenges and Potentials of Emerging Multicore Architectures
Stuermer, Markus
Wellein, Gerhard
Hager, Georg
Koestler, Harald
Ruede, Ulrich
[J]. HIGH PERFORMANCE COMPUTING IN SCIENCE AND ENGINEERING, GARCH/MUNICH 2007, 2009, : 551 - +

← 1 2 3 4 5 →