A study on communication issues for systems-on-chip

被引:43
|
作者
Zeferino, CA [1 ]
Kreutz, ME [1 ]
Carro, L [1 ]
Susin, AA [1 ]
机构
[1] Univ Fed Rio Grande do Sul, Inst Informat, BR-91501970 Porto Alegre, RS, Brazil
关键词
D O I
10.1109/SBCCI.2002.1137647
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Present days cores composing a System-on-Chip might be interconnected by means of both dedicated channels or shared buses. Nevertheless, future systems will have strong requirements on reusability and communication performance, which will constrain the use of such interconnect systems. An emerging approach, the Networks-on-Chip (NOCs), will potentially fulfill those requirements, because NOCs are reusable and their communication performance gracefully scales with the system growth. However, it is still not clear when the use of NOCs will become mandatory. This work introduces some studies to define the switching point when NOCs become the preferred communication architecture. A bus and a NOC are modeled and compared by using a set of mathematical models.
引用
收藏
页码:121 / 126
页数:6
相关论文
共 50 条
  • [1] Unified inter-communication architecture for systems-on-chip
    Barba, F. Rincon J.
    Moya, F.
    Villanueva, F. J.
    Villa, D.
    Dondo, J.
    Lopez, J. C.
    [J]. RSP 2007: 18TH IEEE/IFIP INTERNATIONAL WORKSHOP ON RAPID SYSTEM PROTOTYPING, PROCEEDINGS, 2007, : 17 - +
  • [2] Wireless systems-on-chip
    Franca, JE
    [J]. 2001 4TH INTERNATIONAL CONFERENCE ON ASIC PROCEEDINGS, 2001, : 842 - 842
  • [3] Systems-on-chip for telecommunications
    Naviner, JF
    [J]. ANNALES DES TELECOMMUNICATIONS-ANNALS OF TELECOMMUNICATIONS, 2004, 59 (7-8): : 755 - 758
  • [4] The Study of a Dynamic Reconfiguration Manager for Systems-on-Chip
    Kuehnle, Matthias
    Brito, Alisson
    Roth, Christoph
    Dagas, Konstantinos
    Becker, Juergen
    [J]. 2011 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI (ISVLSI), 2011, : 13 - 18
  • [5] Functional processor-based testing of communication peripherals in systems-on-chip
    Apostolakis, Andreas
    Psarakis, Mihalis
    Gizopoulos, Dimitris
    Paschalis, Antonis
    [J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2007, 15 (08) : 971 - 975
  • [6] Microsensor integration into systems-on-chip
    Brand, Oliver
    [J]. PROCEEDINGS OF THE IEEE, 2006, 94 (06) : 1160 - 1176
  • [7] Configurable Systems-on-Chip (CSoC)
    Becker, J
    [J]. 15TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, PROCEEDINGS, 2002, : 379 - 384
  • [8] Systems-on-chip: what are the limits?
    Roza, E
    [J]. ELECTRONICS & COMMUNICATION ENGINEERING JOURNAL, 2001, 13 (06): : 249 - 255
  • [9] Systems-on-Chip with Strong Ordering
    Puthoor, Sooraj
    Lipasti, Mikko H.
    [J]. ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2021, 18 (01)
  • [10] Functional debugging of systems-on-chip
    Kirovski, D
    Potkonjak, M
    Guerra, LM
    [J]. 1998 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN: DIGEST OF TECHNICAL PAPERS, 1998, : 525 - 528