FHAM: FPGA-based High-Efficiency Approximate Multipliers via LUT Encoding

Approximate computing as a promising technique is widely used in a variety of error tolerance applications, such as computer vision, machine learning and image processing. Since multiplication is one of the basic arithmetic operations used extensively among these applications which creates a great potential to reduce the circuit's area and power consumption by exploring approximate multipliers. In this paper, we present FHAM, a novel methodology for FPGA-based approximate softcore multiplier architecture via modifying INIT parameter values in LUT primitives. Our proposed approximate multipliers can achieve up to 24.4%, 52.9%, 56.4% improvement in delay, area and power over Xilinx soft multiplier IP core, respectively. We deployed the proposed approximate multiplier designs in the application of image blending, the results demonstrate that proposed multiplier design has a better accuracy-hardware trade-off than other designs.