Technological Stack for Implementation of AI as a Service based on Hardware Accelerators

被引:1
|
作者
Perepelitsyn, Artem [1 ]
Fesenko, Herman [1 ]
Kasapien, Yelyzaveta [1 ]
Kharchenko, Vyacheslav [1 ]
机构
[1] Natl Aerosp Univ KhAI, Dept Comp Syst Networks & Cybersecur, Kharkiv, Ukraine
关键词
FPGA; AI as a Service; Heterogeneous AI System Design; Hardware AI Accelerators; DPU; HBM; XRT;
D O I
10.1109/DESSERT58054.2022.10018615
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
One of the most important areas for FPGA is implementation of artificial intelligence. Manufacturers of processors add special registers and special hardware optimizations to build such systems. FPGA is much better suited for this because development environments already allow to use existing AI libraries. For FPGA-based AI flow with such tools the time to market is significantly lower than in the case of classical development. The optimization of neural network for FPGA is based on pruning of branches with low priority and use of fixed point representation of levels for voting. Use FPGA communication framework for communication over PCIe allows to represent accelerator for AI computations as call of function for developer. At the same time chips with HBM helps to implement memory intensive AI algorithms. The supported languages for FPGA development of AI were analyzed and the prototype of medical AI service was developed, trained and validated.
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页数:5
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