A Hardware-Efficient Deblocking Filter Design for HEVC

被引：0

作者：

Fang, Chih-Chung ^{[1
]}

Chen, I-Wen ^{[1
]}

Chang, Tian-Sheuan ^{[1
]}

机构：

[1] Natl Chiao Tung Univ, Inst Elect, Hsinchu 30050, Taiwan

来源：

2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2015年

关键词：

Deblocking filter; HEVC; VLSI architecture design;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a hardware-efficient deblocking filter architecture for High Efficiency Video Coding (HEVC) to reduce visual artifacts at block boundaries. This design proposes an interleaved scheduling to reduce the intermediate data storage to be 1536 bits instead of whole 8192 bits. The implementation with 90 nm CMOS technology can support real-time deblocking operation of 7682x4320@30 fps under 141.5 MHz with only 31K gate count.

引用

页码：1786 / 1789

页数：4

共 50 条

[41] Hardware-Efficient 2D-DCT/IDCT Architecture for Portable HEVC-Compliant Devices
Singhadia, Ashish
Mamillapalli, Meghan
Chakrabarti, Indrajit
[J]. IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, 2020, 66 (03) : 203 - 212
[42] A High-Throughput Deblocking Filter VLSI Architecture for HEVC
Zhou, Wei
Zhang, Jingzhi
Zhou, Xin
Liu, Tongqing
[J]. 2015 VISUAL COMMUNICATIONS AND IMAGE PROCESSING (VCIP), 2015,
[43] HEVC-BASED DEBLOCKING FILTER WITH RAMP PRESERVATION PROPERTIES
Norkin, Andrey
[J]. 2014 IEEE INTERNATIONAL CONFERENCE ON IMAGE PROCESSING (ICIP), 2014, : 3666 - 3670
[44] Hardware-Efficient Parallel Structures for Linear-Phase FIR Digital Filter
Tian, Jingjing
Li, Guangjun
Li, Qiang
[J]. 2013 IEEE 56TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2013, : 995 - 998
[45] A High-Throughput VLSI Architecture for Deblocking Filter in HEVC
Shen, Weiwei
Shang, Qing
Shen, Sha
Fan, Yibo
Zeng, Xiaoyang
[J]. 2013 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2013, : 673 - 676
[46] Parallel deblocking filter for HEVC on many-core processor
Yan, Chenggang
Zhang, Yongdong
Dai, Feng
Wang, Xi
Li, Liang
Dai, Qionghai
[J]. ELECTRONICS LETTERS, 2014, 50 (05) : 367 - +
[47] CONTENT-AWARE PARAMETER SELECTION FOR HEVC DEBLOCKING FILTER
Candan, Mucahid
Ozbek, Nukhet
[J]. 2016 24TH SIGNAL PROCESSING AND COMMUNICATION APPLICATION CONFERENCE (SIU), 2016, : 1213 - 1216
[48] An Efficient Real-Time Hardware Architecture for Deblocking Filter in AVS3
Wang, Shaokang
Huang, Xiaofeng
Xiang, Guoqing
Zhu, Xizhong
Yang, Jiaojiao
Zhang, Peng
Jia, Huizhu
Xie, Xiaodong
[J]. 2023 IEEE INTERNATIONAL CONFERENCE ON MULTIMEDIA AND EXPO, ICME, 2023, : 2561 - 2566
[49] LOW COMPLEXITY DEBLOCKING FILTER PERCEPTUAL OPTIMIZATION FOR THE HEVC CODEC
Naccari, Matteo
Brites, Catarina
Ascenso, Joao
Pereira, Fernando
[J]. 2011 18TH IEEE INTERNATIONAL CONFERENCE ON IMAGE PROCESSING (ICIP), 2011, : 737 - 740
[50] A High-Throughput and Memory-Efficient Deblocking Filter Hardware Architecture for VVC
Hou, Bingjing
Huang, Leilei
Jing, Minge
Fan, Yibo
[J]. IEEE Transactions on Circuits and Systems for Video Technology, 2024, 34 (12) : 13569 - 13583

← 1 2 3 4 5 →