A new approach for initialization sequences computation for synchronous sequential circuits

被引:5
|
作者
Corno, F
Prinetto, P
Rebaudengo, M
Reorda, MS
Squillero, G
机构
关键词
D O I
10.1109/ICCD.1997.628898
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a new approach to the automated generation of an initialization sequence for synchronous sequential circuits. Finding an initialization sequence is a hard task when a global reset signal is nor available, and functional techniques often can not handle large circuits. We propose a Genetic Algorithm providing a sequence that aims at initializing the highest number of flip flops with the lowest number of vectors. The experimental results we provide show that the approach is feasible to be applied even to the largest benchmark circuits and that it compares well to other known approaches in terms of initialized flip flops and sequence length.
引用
收藏
页码:381 / 386
页数:6
相关论文
共 50 条
  • [1] A genetic algorithm for the computation of initialization sequences for synchronous sequential circuits
    Corno, F
    Prinetto, P
    Rebaudengo, M
    Reorda, MS
    Squillero, G
    [J]. SIXTH ASIAN TEST SYMPOSIUM (ATS'97), PROCEEDINGS, 1997, : 56 - 61
  • [2] Verification of Initialization Sequences for Sequential Circuits
    Morkunas, K.
    Seinauskas, R.
    [J]. ELEKTRONIKA IR ELEKTROTECHNIKA, 2011, (06) : 61 - 64
  • [3] Ant Colony Optimizations for Initialization of synchronous sequential circuits
    Hu, Xiaojing
    Song, Zhengxiang
    Wang, Jianhua
    Geng, Yingsan
    Shen, Wang
    [J]. IEEE CIRCUITS AND SYSTEMS INTERNATIONAL CONFERENCE ON TESTING AND DIAGNOSIS, 2009, : 424 - 427
  • [4] VERIFICATION OF INITIALIZATION SEQUENCES FOR SEQUENTIAL CIRCUITS BY USING DEPENDENCY MATRIXES
    Morkunas, Kestutis
    Seinauskas, Rimantas
    [J]. 10TH INTERNATIONAL INDUSTRIAL SIMULATION CONFERENCE 2012 (ISC 2012), 2012, : 71 - 73
  • [5] VERIFICATION OF INITIALIZATION SEQUENCES FOR SEQUENTIAL CIRCUITS BY USING DEPENDENCY MATRIXES
    Morkunas, Kestutis
    Seinauskas, Rimantas
    [J]. ELECTRICAL AND CONTROL TECHNOLOGIES, 2011, : 120 - +
  • [6] On static compaction of test sequences for synchronous sequential circuits
    Pomeranz, I
    Reddy, SM
    [J]. 33RD DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 1996, 1996, : 215 - 220
  • [7] Static compaction of test sequences for synchronous sequential circuits
    Xu, CP
    Li, Z
    Mo, W
    [J]. ICEMI'2003: PROCEEDINGS OF THE SIXTH INTERNATIONAL CONFERENCE ON ELECTRONIC MEASUREMENT & INSTRUMENTS, VOLS 1-3, 2003, : 160 - 163
  • [8] On removing redundancies from synchronous sequential circuits with synchronizing sequences
    Pomeranz, I
    Reddy, SM
    [J]. IEEE TRANSACTIONS ON COMPUTERS, 1996, 45 (01) : 20 - 32
  • [9] Procedures for static compaction of test sequences for synchronous sequential circuits
    Pomeranz, I
    Reddy, SM
    [J]. IEEE TRANSACTIONS ON COMPUTERS, 2000, 49 (06) : 596 - 607
  • [10] On n-detection test sequences for synchronous sequential circuits
    Pomeranz, I
    Reddy, SM
    [J]. 15TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 1997, : 336 - 342