Graph-Logic Models of Hierarchical Fault-Tolerant Multiprocessor Systems

被引:0
|
作者
Romankevich, Alexei M. [1 ]
Morozov, Kostiantyn, V [1 ]
Romankevich, Vitaliy A. [1 ]
机构
[1] Natl Tech Univ Ukraine, Igor Sikorsky Kyiv Polytech Inst, Kiev, Ukraine
关键词
fault-tolerant multiprocessor systems; graph-logic GL model models; reliability calculation;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
The work discusses the further development of graph-logic models (GL-models), which reflect the behavior of fault-tolerant multiprocessor systems (FTMS) in the component failover stream. The main attention is paid to the method of combining GL-models of different FTMSs into a single model. Constructing approach is proposed for graph-logic models of hierarchical failover multiprocessor systems consisting of several subsystems. Primarily, it concerns systems for managing complex objects, where the principle of partitioning a complex task of management into a set of simpler ones is often used. The approach is to construct individual models for each of the subsystems and combine them into a single model, also possessing a hierarchical property. Each of these submodels can be constructed by any convenient method. One of the advantages of this approach is the relative model transformation simplicity in case of individual subsystems modification. Such FTMSs are called k-out-of-n systems.
引用
收藏
页码:151 / 156
页数:6
相关论文
共 50 条
  • [21] Efficient fault-tolerant scheduling on multiprocessor systems via replication and deallocation
    Zhang, Jun
    Sha, Edwin H-M.
    Zhuge, Qingfeng
    Yi, Juan
    Wu, Kaijie
    [J]. INTERNATIONAL JOURNAL OF EMBEDDED SYSTEMS, 2014, 6 (2-3) : 216 - 224
  • [22] Fault-tolerant hierarchical routing
    Alari, G
    Datta, A
    Derby, J
    Lawrence, J
    [J]. 1977 IEEE INTERNATIONAL PERFORMANCE, COMPUTING AND COMMUNICATIONS CONFERENCE, 1997, : 159 - 165
  • [23] A fault-tolerant default logic
    Lin, Zhangang
    Ma, Yue
    Lin, Zuoquan
    [J]. LOGICS IN ARTIFICIAL INTELLIGENCE, PROCEEDINGS, 2006, 4160 : 253 - 265
  • [24] MODELS AND PROPERTIES OF MULTIALTERNATIVE FAULT-TOLERANT SYSTEMS
    KHARCHENKO, VS
    [J]. AUTOMATION AND REMOTE CONTROL, 1992, 53 (12) : 1944 - 1950
  • [25] THE POLYBUS - A FLEXIBLE AND FAULT-TOLERANT MULTIPROCESSOR INTERCONNECTION
    MANNER, R
    DELUIGI, B
    SAALER, W
    SAUER, T
    WALTER, PV
    [J]. INTERFACES IN COMPUTING, 1984, 2 (01): : 45 - 68
  • [26] DISTRIBUTED RECOVERY IN FAULT-TOLERANT MULTIPROCESSOR NETWORKS
    YANNEY, RM
    HAYES, JP
    [J]. IEEE TRANSACTIONS ON COMPUTERS, 1986, 35 (10) : 871 - 879
  • [27] ARCHITECTURAL ELEMENTS OF A SYMMETRIC FAULT-TOLERANT MULTIPROCESSOR
    HOPKINS, AL
    SMITH, TB
    [J]. IEEE TRANSACTIONS ON COMPUTERS, 1975, C 24 (05) : 498 - 505
  • [28] A fault-tolerant single-chip multiprocessor
    Yao, WB
    Wang, DS
    Zheng, WM
    [J]. ADVANCES IN COMPUTER SYSTEMS ARCHITECTURE, PROCEEDINGS, 2004, 3189 : 137 - 145
  • [29] ON AN OPTIMALLY FAULT-TOLERANT MULTIPROCESSOR NETWORK ARCHITECTURE
    SENGUPTA, A
    SEN, A
    BANDYOPADHYAY, S
    [J]. IEEE TRANSACTIONS ON COMPUTERS, 1987, 36 (05) : 619 - 623
  • [30] A MULTIPROCESSOR WORKING AS A FAULT-TOLERANT CELLULAR AUTOMATON
    HANDLER, W
    [J]. COMPUTING, 1992, 48 (01) : 5 - 20