Hardware-Accelerated Cross-Architecture Full-System Virtualization

被引:9
|
作者
Spink, Tom [1 ]
Wagstaff, Harry [2 ]
Franke, Bjoern [3 ]
机构
[1] Informat Forum, IF 1 47, 10 Crichton St, Edinburgh EH8 9AL, Midlothian, Scotland
[2] Informat Forum, IF 3 38, 10 Crichton St, Edinburgh EH8 9AL, Midlothian, Scotland
[3] Informat Forum, IF 1 04, 10 Crichton St, Edinburgh EH8 9AL, Midlothian, Scotland
基金
英国工程与自然科学研究理事会;
关键词
Virtualization;
D O I
10.1145/2996798
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Hardware virtualization solutions provide users with benefits ranging from application isolation through server consolidation to improved disaster recovery and faster server provisioning. While hardware assistance for virtualization is supported by all major processor architectures, including Intel, ARM, PowerPC, and MIPS, these extensions are targeted at virtualization of the same architecture, for example, an x86 guest on an x86 host system. Existing techniques for cross-architecture virtualization, for example, an ARM guest on an x86 host, still incur a substantial overhead for CPU, memory, and I/O virtualization due to the necessity for software emulation of these mismatched system components. In this article, we present a new hardwareaccelerated hypervisor called CAPTIVE, employing a range of novel techniques that exploit existing hardware virtualization extensions for improving the performance of full-system cross-platform virtualization. We illustrate how (1) guest memory management unit (MMU) events and operations can be mapped onto host memory virtualization extensions, eliminating the need for costly softwareMMUemulation, (2) a block-based dynamic binary translation engine inside the virtual machine can improve CPU virtualization performance, (3) memory-mapped guest I/O can be efficiently translated to fast I/O specific calls to emulated devices, and (4) the cost for asynchronous guest interrupts can be reduced. For an ARM-based Linux guest system running on an x86 host with Intel VT support, we demonstrate application performance levels, based on SPEC CPU2006 benchmarks, of up to 5.88x over state-of-the-art QEMU and 2.5x on average, achieving a guest dynamic instruction throughput of up to 1280 MIPS (million instructions per second) and 915.52 MIPS, on average.
引用
收藏
页数:25
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