SELECTIVE REMOVAL OF HIGH-K GATE DIELECTRICS

被引：38

作者：

Shamiryan, D. ^{[1
,2
]}

Baklanov, M. ^{[1
,2
]}

Claes, M. ^{[1
,2
]}

Boullart, W. ^{[1
,2
]}

Paraschiv, V. ^{[1
,2
]}

机构：

[1] IMEC, Leuven, Belgium

[2] IMEC, B-3001 Louvain, Belgium

来源：

CHEMICAL ENGINEERING COMMUNICATIONS | 2009年 / 196卷 / 12期

关键词：

High-k dielectrics; High-k etching; Plasma etching; Wet etching; METAL-OXIDE-SEMICONDUCTOR; INDUCTIVELY-COUPLED PLASMAS; ATOMIC CHLORINE DENSITY; ZRO2; THIN-FILMS; HFO2; FILMS; ETCHING CHARACTERISTICS; ELECTRICAL CHARACTERISTICS; HAFNIUM SILICATES; ION KINETICS; H-2; PLASMAS;

D O I：

10.1080/00986440903155428

中图分类号：

TQ [化学工业];

学科分类号：

0817 ;

摘要：

Continuous downscaling of integrated circuits brought an end to the era of SiO2. In gate dielectrics, it is being replaced by materials with high dielectric constant, so-called high-k dielectrics. One of the challenges in the integration of the high-k material is removal of those materials selectively over the substrate. This work is one of the first attempts to review current state of the art of the high-k removal. Two main approaches are discussed: dry (plasma) removal and wet removal. First, the fundamentals and limitations of both approaches are presented, then an overview of the existing experimental data is given. It is concluded that the best results could be obtained by combining the dry and wet approaches.

引用

页码：1475 / 1535

页数：61

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