A novel transistor model for simulating avalanche-breakdown effects in Si bipolar circuits

被引：53
|
作者：
Rickelt, M [1 ]
Rein, HM [1 ]
机构：
[1] Ruhr Univ Bochum, D-44780 Bochum, Germany
来源：
IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2002年 / 37卷 / 09期
关键词：
bipolar transistors; breakdown voltage; impact ionization; transistor model;
D O I：
10.1109/JSSC.2002.801197
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A physics-based scalable transistor model is described which allows accurate consideration of avalanche-breakdown effects in bipolar circuit simulation. The three-dimensional model consists of six lumped transistor elements, which are connected via elements of the base and emitter-contact resistance. Analytical relations are given to calculate the elements of this six-transistor model (6TM) for arbitrary emitter dimensions from measured area- and length-specific transistor parameters. As a core of the transistor elements, all kinds of conventional transistor models can be used provided an adequate avalanche current source is implemented between the internal collector and base nodes. The validity of this 6TM has been verified under dc and fast transient conditions by simulations and measurements.
引用
收藏
页码：1184 / 1197
页数：14
相关论文
共 50 条
  • [31] Simulation study of a novel GaN on Si quasi-vertical reverse-conducting insulated gate bipolar transistor
    Zhao, Wen
    Zhang, Peng
    Xu, Jiarui
    Du, Jiale
    Hou, Bin
    Zhu, Jiejie
    Ma, Xiaohua
    Hao, Yue
    SEMICONDUCTOR SCIENCE AND TECHNOLOGY, 2025, 40 (02)
  • [32] A Novel Lumped-Charge Model for Insulated Gate Bipolar Transistor Based on Dynamic Charge Control
    Yang, Xin
    Sun, Yifei
    Ding, Yifei
    Liu, Guoyou
    IEEE TRANSACTIONS ON POWER ELECTRONICS, 2023, 38 (08) : 9717 - 9730
  • [33] AVALANCHE BREAKDOWN VOLTAGES OF ABRUPT AND LINEARLY GRADED P-N JUNCTIONS IN GE SI GAAS AND GAP - (DOPANT EFFECTS IMPURITY EFFECTS T)
    SZE, SM
    GIBBONS, G
    APPLIED PHYSICS LETTERS, 1966, 8 (05) : 111 - &
  • [34] Direct extraction technique of π-topology small-signal equivalent circuit model for Si/SiGe heterojunction bipolar transistor
    Taher, H.
    MICROWAVE AND OPTICAL TECHNOLOGY LETTERS, 2012, 54 (03) : 584 - 589
  • [35] Analytical Model of the Parasitic Bipolar Junction Transistor in Low-Doped Double-Gate FinFETs for Pass-Gate Circuits
    Yi, Boram
    Lee, Chang-Yong
    Oh, Jin-Hwan
    Lee, Boung Jun
    Seo, Sungkyu
    Yang, Ji-Woon
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2016, 63 (10) : 3864 - 3868
  • [36] Renewable energy utilization method: A novel. Insulated Gate Bipolar Transistor switching losses prediction model
    Li, Ling-Ling
    Lv, Cong-Min
    Tseng, Ming-Lang
    Song, Malin
    JOURNAL OF CLEANER PRODUCTION, 2018, 176 : 852 - 863
  • [37] A novel temperature-dependent large-signal model of heterojunction bipolar transistor with a unified approach for self-heating and ambient temperature effects
    Park, HM
    Hong, S
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2002, 49 (12) : 2099 - 2106
  • [38] Modeling of Quantum Effects in a charge-based MOS Transistor Model for the Simulation of nanoscale CMOS Analog Circuits
    Stegemann, S.
    Xiong, J.
    Mathis, W.
    ADVANCES IN RADIO SCIENCE, 2009, 7 : 185 - 190
  • [39] Extraction of small-signal model parameters of Si/SiGe heterojunction bipolar transistor using least squares support vector machines
    Taher, H.
    Farrell, R.
    Schreurs, D.
    Nauwelaers, B.
    ELECTRONICS LETTERS, 2015, 51 (22) : 1821 - 1822
  • [40] Novel Kerr-Vernier effects within the on-chip Si-ChG microring circuits
    Ali, J.
    Youplao, P.
    Pornsuwancharoen, N.
    Jalil, M. A.
    Aziz, M. S.
    Chiangga, S.
    Amiri, I. S.
    Punthawanunt, S.
    Singh, G.
    Yupapin, P.
    Grattan, K. T. V.
    RESULTS IN PHYSICS, 2018, 11 : 144 - 147
12345