Composite step-graded collector of InP/InGaAs/InP DHBT for minimised carrier blocking

被引：20
|
作者：
Chor, EF
Peng, CJ
机构：
[1] National University of Singapore, Department of Electrical Engineering, Centre for Optoelectronics, Singapore 0511
来源：
ELECTRONICS LETTERS | 1996年 / 32卷 / 15期
关键词：
heterojunction bipolar transistors; semiconductor devices;
D O I：
10.1049/el:19960889
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A composite step-graded collector of InP/InGaAs/InP DHBT has been investigated for minimised carrier blocking. The optimised collector has the following sub-layers: a 100 Angstrom n InGaAs layer; three 200 Angstrom n InGaAsP layers; and a 100 Angstrom, n = 3 x 10(17) cm(-3) InP layer, and the rest are n InP. The InGaAsP layers should be chosen to give approximately equal band offset at the heterointerfaces.
引用
收藏
页码：1409 / 1410
页数：2
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