Ultra low-voltage current squaring and multiplier

This paper presents the designs of analog CMOS current squaring circuit and four-quadrant multiplier which are capable for operation under ultra-low supply voltage. The design approach is based on CMOS devices operated in the weak inversion and on its exponential I/V characteristic. Both circuits employ the ultra-low supply voltage of 0.5V and achieve very low static power consumption. The constant gain bandwidth is about 0.1MHz for both circuits. Total harmonic distortion at 100kHz is -52dB and -36dB with power consumption 13 mu W and 18 mu W for the squarer and multiplier, respectively. Theirs performances were verified by simulations using transistor's models of standard 0.18 mu m CMOS process.