共 50 条
- [24] Power Noise Isolation in a Silicon Interposer with Through Silicon Vias 2014 IEEE 16TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE (EPTC), 2014, : 805 - 808
- [25] Through-Silicon Vias: Drivers, Performance, and Innovations IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2016, 6 (07): : 1009 - 1019
- [26] Towards Ultrasonic Through-Silicon Vias (UTSV) 2014 IEEE INTERNATIONAL ULTRASONICS SYMPOSIUM (IUS), 2014, : 483 - 486
- [27] Rigorous Electrical Modeling of Through Silicon Vias (TSVs) with MOS Capacitance Effects IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2011, 1 (06): : 893 - 903
- [28] RF Characterization and Modeling of Through-Silicon Vias 2013 EUROPEAN MICROELECTRONICS PACKAGING CONFERENCE (EMPC), 2013,
- [29] Closed-Form Expression for Capacitance of Tapered Through-Silicon-Vias Considering MOS Effect 2013 14TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), 2013, : 1250 - 1254
- [30] High frequency characterization and analysis of through silicon vias and coplanar waveguides for silicon interposer MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS, 2016, 22 (02): : 337 - 347