Optimization Algorithm Analysis for FIR Filter by FPGA

被引：1
|
作者：
Shen, Zhao-Jun [1 ]
Xu, Sen [1 ]
机构：
[1] YANCHEN Inst Informat Engn Coll, Yanchen 224051, Jiangsu, Peoples R China
来源：
MECHATRONICS, ROBOTICS AND AUTOMATION, PTS 1-3 | 2013年 / 373-375卷
关键词：
FIR; FPGA; Serial Shifts; Low Pass Filter;
D O I：
10.4028/www.scientific.net/AMM.373-375.1269
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
The article introduces essential method to realize the high accuracy and velocity FIR filter by FPGA. Proposes the FIR filter optimization scheme design of serial shifts based on FPGA. Avoided the shortcoming of the traditional parallel algorithm module taking the massive hardware resources. And give 11-order and 8-bits low pass filter design as the specific research object. Realized the partial functions which the traditional numeral FIR filter cannot.May adjusts the filter exponent number conveniently and suits different application.
引用
收藏
页码：1269 / 1273
页数：5
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