A 1.25Gsps 0.35um SiGe BiCMOS track and hold circuit

In this paper, a novel track and hold circuit in 0.35um SiGe BiCMOS process is presented. Compared to the traditional one, several improvements are made on the proposed track and hold circuit. At first, multistage architecture is used, which has better isolation. Secondly, a saturation protection circuit is designed into the track and hold circuit to prevent the NPN transistor from getting into saturation state. The simulation results show that the proposed track and hold circuit has a SFDR of 82dB and SNR of 76dB at the sampling rate of 1.25Gsps. Further simulation proved that the proposed track and hold circuit has better performances than the traditional one.