3D DRAM Based Application Specific Hardware Accelerator for SpMV

被引:0
|
作者
Sadi, Fazle [1 ]
Pileggi, Larry [1 ]
Franchetti, Franz [1 ]
机构
[1] Carnegie Mellon Univ, Dept Elect & Comp Engn, Pittsburgh, PA 15213 USA
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
引用
收藏
页数:1
相关论文
共 50 条
  • [1] Hardware Accelerator for 3D Method of Moments based Parasitic Extraction
    Devi, Anant
    Gandhi, Maulik
    Varghese, Kuruvilla
    Gope, Dipanjan
    2013 IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGING AND SYSTEMS SYMPOSIUM (EDAPS), 2013, : 100 - 103
  • [2] 3D DRAM Design and Application to 3D Multicore Systems
    Sun, Hongbin
    Liu, Jibang
    Anigundi, Rakesh S.
    Zheng, Nanning
    Lu, Jian-Qiang
    Rose, Kenneth
    Zhang, Tong
    IEEE DESIGN & TEST OF COMPUTERS, 2009, 26 (05): : 36 - 46
  • [3] Hardware accelerator and 3D pixel shader architecture for computer graphics
    Han, Jungang
    Jiang, Lin
    Du, Huimin
    Cao, Xiaopeng
    Dong, Liang
    Meng, Lilin
    Zhao, Quanliang
    Yin, Chengxin
    Zhang, Jun
    Jisuanji Fuzhu Sheji Yu Tuxingxue Xuebao/Journal of Computer-Aided Design and Computer Graphics, 2010, 22 (03): : 363 - 372
  • [4] Towards designing a hardware accelerator for 3D convolutional neural networks
    Khan, Fatima Hameed
    Pasha, Muhammad Adeel
    Masud, Shahid
    COMPUTERS & ELECTRICAL ENGINEERING, 2023, 105
  • [5] Efficient binary 3D convolutional neural network and hardware accelerator
    Guoqing Li
    Meng Zhang
    Qianru Zhang
    Zhijian Lin
    Journal of Real-Time Image Processing, 2022, 19 : 61 - 71
  • [6] Efficient binary 3D convolutional neural network and hardware accelerator
    Li, Guoqing
    Zhang, Meng
    Zhang, Qianru
    Lin, Zhijian
    JOURNAL OF REAL-TIME IMAGE PROCESSING, 2022, 19 (01) : 61 - 71
  • [7] Open-Source SpMV Multiplication Hardware Accelerator for FPGA-Based HPC Systems
    Mpakos, Panagiotis
    Tasou, Ioanna
    Alverti, Chloe
    Miliadis, Panagiotis
    Malakonakis, Pavlos
    Theodoropoulos, Dimitris
    Goumas, Georgios
    Pnevmatikatos, Dionisios N.
    Koziris, Nectarios
    APPLIED RECONFIGURABLE COMPUTING. ARCHITECTURES, TOOLS, AND APPLICATIONS, ARC 2024, 2024, 14553 : 19 - 32
  • [8] Accelerator Design using 3D Stacked Capacitorless DRAM for Large Language Models
    Sharda, Janak
    Hsu, Po-Kai
    Yu, Shimeng
    2024 IEEE 6TH INTERNATIONAL CONFERENCE ON AI CIRCUITS AND SYSTEMS, AICAS 2024, 2024, : 487 - 491
  • [9] A deeply-pipelined FPGA-based SpMV accelerator with a hardware-friendly storage scheme
    Guo, Song
    Dou, Yong
    Lei, Yuanwu
    Wu, Guiming
    IEICE ELECTRONICS EXPRESS, 2015, 12 (11):
  • [10] Comparison of Different Deployment Approaches of FPGA-Based Hardware Accelerator for 3D Object Detection Models
    Pereira, Pedro
    Silva, Antonio Linhares
    Machado, Rui
    Silva, Joao
    Duraes, Dalila
    Machado, Jose
    Novais, Paulo
    Monteiro, Joao
    Melo-Pinto, Pedro
    Fernandes, Duarte
    PROGRESS IN ARTIFICIAL INTELLIGENCE, EPIA 2022, 2022, 13566 : 285 - 296