Concurrent error detection in array multipliers for GF(2m) fields

被引：21
|
作者：
Chiou, CW [1 ]
机构：
[1] Ching Yun Inst Technol, Dept Elect Engn, Chungli 320, Taiwan
来源：
ELECTRONICS LETTERS | 2002年 / 38卷 / 14期
关键词：
D O I：
10.1049/el:20020468
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Based on Lee-Lu-Lee's array multipliers and the RESO method, a concurrent error detection scheme in array multipliers for GF(2(m)) fields is presented and only one clock cycle is added. The fault tolerant capability in such array multipliers is also included and only two extra clock cycles are required.
引用
收藏
页码：688 / 689
页数：2
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