Design of Passive UHF RFID Tag in 130nm CMOS Technology

被引：10

作者：

Hong, Yang ^{[1
]}

Chan, Chi Fat ^{[1
]}

Guo, Jianping ^{[1
]}

Ng, Yuen Sum ^{[1
]}

Shi, Weiwei ^{[1
]}

Leung, Lai Kan ^{[1
]}

Leung, Ka Nang ^{[1
]}

Choy, Chiu Sing ^{[1
]}

Pun, Kong Pang ^{[1
]}

机构：

[1] Chinese Univ Hong Kong, Dept Elect Engn, Shatin, Hong Kong, Peoples R China

来源：

2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2008), VOLS 1-4 | 2008年

关键词：

D O I：

10.1109/APCCAS.2008.4746284

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents a low-power, passive, UHF RFID tag design compatible with EPC (TM) C1G2 protocol. In order to reduce its cost, diode-connected NMOS in a standard CMOS technology is used instead of Schottky diodes. With the help of low-threshold-voltage, triple-well NMOS, a minimum input power of -7.6dBm is achieved. A sub-1V, low temperature-coefficient voltage reference using self-biased mutual compensation is proposed without large resistors to save the chip area. In addition, an energy-aware irregular clock structure, together with clock gating, achieves low power consumption in the baseband processor. The whole tag is implemented in a 130nm CMOS technology and the total chip area is 1200umx1220um.

引用

页码：1371 / 1374

页数：4

共 50 条

[41] Modeling and Design of a Dual-Residue Pipelined ADC in 130nm CMOS
Steen-Hansen, Eirik
Ytterdal, Trond
2012 NORCHIP, 2012,
[42] Design and Characterization of Three Stage CMOS Op Amps in 130nm Technology with Indirect Feedback Compensation Technique
Guliga, H.
Herman, S. H.
Abdullah, W. F. H.
2015 IEEE STUDENT CONFERENCE ON RESEARCH AND DEVELOPMENT (SCORED), 2015, : 605 - 609
[43] Design and Test of a RFID UHF Tag
Yang, Xiaofeng
Meng, Lingyong
Yu, Fengqi
Yang, Liwu
Wu, Qinyang
Su, Jiankun
Lu, Jiefei
Li, Guangbo
PROCEEDINGS OF THE 2009 PACIFIC-ASIA CONFERENCE ON CIRCUITS, COMMUNICATIONS AND SYSTEM, 2009, : 346 - +
[44] An Analog Online Clustering Circuit in 130nm CMOS
Lu, Junjie
Young, Steven
Arel, Itamar
Holleman, Jeremy
PROCEEDINGS OF THE 2013 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE (A-SSCC), 2013, : 177 - 180
[45] A Fully-integrated Optical Duobinary Transceiver in a 130nm SOI CMOS Technology
Buckwalter, James F.
Kim, Joohwa
Zheng, Xuezhe
Li, Guoliang
Raj, Kannan
Krishnamoorthy, Ashok
2011 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 2011,
[46] On-chip Oscilloscope for Signal Integrity Characterization of Interconnects in 130nm CMOS Technology
Milosevic, Pavle
Schutt-Aine, Jose E.
2008 IEEE-EPEP ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING, 2008, : 57 - 60
[47] A 130nm CMOS Polar Quantizer for Cellular Applications
Nazari, Peyman
Chun, Byung-Kwan
Kumar, Vipul
Middleton, Eric
Wang, Zheng
Heydari, Payam
2013 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS SYMPOSIUM (RFIC), 2013, : 155 - 158
[48] Design and performance of passive UHF RFID tag antenna for industrial paper reels
Ukkonen, Leena
Sydanheimo, Lauri
Kivikoski, Markku
2007 IEEE ANTENNAS AND PROPAGATION SOCIETY INTERNATIONAL SYMPOSIUM, VOLS 1-12, 2007, : 5000 - 5003
[49] Design and implementation of a high sensitivity fully integrated passive UHF RFID tag
Li Shoucheng
Wang Xin'an
Lin Ke
Shen Jinpeng
Zhang Jinhai
JOURNAL OF SEMICONDUCTORS, 2014, 35 (10)
[50] The Stability Performance Analysis of SRAM Cell Topologies in 90nm and 130nm CMOS technology
Gaadhe, Ajjay
Shirode, Ujwal
Kanphade, Rajendra
2021 INTERNATIONAL CONFERENCE ON EMERGING SMART COMPUTING AND INFORMATICS (ESCI), 2021, : 733 - 736

← 1 2 3 4 5 →