A study of chip-last embedded flip-chip package

被引:1
|
作者
Chao, Shin-Hua [1 ,2 ]
Tong, Ho-Ming [1 ]
Hung, Chih-Pin [1 ]
Lai, Yishao [1 ]
Liu, Colin [1 ]
Hsieh, Emma [1 ]
Luh, Ding-Bang [2 ]
机构
[1] Adv Semicond Engn Inc, NEPZ Zone, Kaohsiung, Taiwan
[2] Natl Cheng Kung Univ, Dept Ind Design, Tainan 70101, Taiwan
关键词
design for cost; embedded flip chip; thermally enhanced FCCSP; warpage control;
D O I
10.1080/02533839.2013.839424
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Flip-chip chip-scale packaging (FCCSP) has recently emerged as a package solution achieving superior performance over traditional wire-bonding technology. There are also further possible advances for the assembly process such as under-fill and molding to be more cost effective. We propose an innovative process of a heterogeneous integration of the organic substrate and the standard FCCSP assembly process. This is achieved with technical and material improvements; the result is a new type of molding and under-fill technology that has higher process efficiency than conventional molding and under-fill and demonstrates good thermal dissipation and warpage control. The new process and the resulting package reliability are validated by test vehicle engineering verifications. This 'laminated' FCCSP platform is a type of 'chip-last embedded die' structure that is extendable to support stackable packages for use in advanced package-on-package applications.
引用
收藏
页码:827 / 832
页数:6
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