High-radix cordic algorithms for VLSI signal processing

被引：1
|
作者：
Aoki, T
Nogi, H
Higuchi, T
机构：
来源：
SIPS 97 - 1997 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS: DESIGN AND IMPLEMENTATION | 1997年
关键词：
D O I：
10.1109/SIPS.1997.626115
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper presents high-radix CORDIC algorithms for high-speed sine and cosine computation. Since the CORDIC calculation takes O(n) steps for evaluating a function in n-bit precision, significant reduction of processing latency is required for real-time signal processing applications. In this paper, we present a unified approach to low-latency CORDIC implementation based on high-radix algorithms, and propose ''radix-2-4-8 CORDIC processor'', which achieves low-latency computation by changing radix during execution.
引用
收藏
页码：183 / 192
页数：10
相关论文
共 50 条
  • [1] High-radix parallel dividers for VLSI signal processing
    Aoki, T
    Tokoyo, H
    Higuchi, T
    [J]. VLSI SIGNAL PROCESSING, IX, 1996, : 83 - 92
  • [2] HCORDIC: A high-radix adaptive CORDIC algorithm
    Elguibaly, F
    Sui, NT
    Rayhan, A
    [J]. CANADIAN JOURNAL OF ELECTRICAL AND COMPUTER ENGINEERING-REVUE CANADIENNE DE GENIE ELECTRIQUE ET INFORMATIQUE, 2000, 25 (04): : 149 - 154
  • [3] Complex logarithmic number system arithmetic using high-radix redundant CORDIC algorithms
    Lewis, D
    [J]. 14TH IEEE SYMPOSIUM ON COMPUTER ARITHMETIC, PROCEEDINGS, 1999, : 194 - 203
  • [4] Pipelining high-radix SRT division algorithms
    Upadhyay, Saurabh
    Stine, James E.
    [J]. 2007 50TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-3, 2007, : 266 - 269
  • [5] Design of fast high-radix SRT dividers and their VLSI implementation
    Wey, CL
    [J]. IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES, 2000, 147 (04): : 275 - 281
  • [6] Design of high-radix VLSI dividers without quotient selection tables
    Aoki, T
    Nakazawa, K
    Higuchi, T
    [J]. IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2001, E84A (11): : 2623 - 2631
  • [7] A VLSI architecture of fast high-radix modular multiplication for RSA cryptosystem
    Wu, CH
    Shieh, MD
    Wu, CH
    Sheu, MH
    Sheu, JL
    [J]. ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1: VLSI, 1999, : 500 - 503
  • [8] CORDIC- Based VLSI architectures for digital signal processing
    Hu, Yu Hen
    [J]. IEEE SIGNAL PROCESSING MAGAZINE, 1992, 9 (03) : 16 - 35
  • [9] HGH-CORDIC: A High-Radix Generalized Hyperbolic COordinate Rotation Digital Computer
    Chen, Hui
    Quan, Lianghua
    Liu, Weiqiang
    [J]. PROCEEDINGS 2024 IEEE 31ST SYMPOSIUM ON COMPUTER ARITHMETIC, ARITH 2024, 2024, : 88 - 95
  • [10] A Novel Paradigm of CORDIC-Based FFT Architecture Framed on the Optimality of High-Radix Computation
    Ayan Banerjee
    Anindya Sundar Dhar
    [J]. Circuits, Systems, and Signal Processing, 2021, 40 : 311 - 334
12345