P-channel differential multiple-time programmable memory cells by laterally coupled floating metal gate fin field-effect transistors

被引:0
|
作者
Wang, Tai-Min [1 ]
Chien, Wei-Yu [1 ]
Hsu, Chia-Ling [1 ]
Lin, Chrong Jung [1 ]
King, Ya-Chin [1 ]
机构
[1] Natl Tsing Hua Univ, Inst Elect Engn, Microelect Lab, Hsinchu 300, Taiwan
关键词
MTP MEMORY; LOGIC; NVM;
D O I
10.7567/JJAP.57.04FE14
中图分类号
O59 [应用物理学];
学科分类号
摘要
In this paper, we present a new differential p-channel multiple-time programmable (MTP) memory cell that is fully compatible with advanced 16 nm CMOS fin field-effect transistors (FinFET) logic processes. This differential MTP cell stores complementary data in floating gates coupled by a slot contact structure, which make different read currents possible on a single cell. In nanoscale CMOS FinFET logic processes, the gate dielectric layer becomes too thin to retain charges inside floating gates for nonvolatile data storage. By using a differential architecture, the sensing window of the cell can be extended and maintained by an advanced blanket boost scheme. The charge retention problem in floating gate cells can be improved by periodic restoring lost charges when significant read window narrowing occurs. In addition to high programming efficiency, this p-channel MTP cells also exhibit good cycling endurance as well as disturbance immunity. The blanket boost scheme can remedy the charge loss problem under thin gate dielectrics. (C) 2018 The Japan Society of Applied Physics.
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页数:4
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