An Effective Method for Evaluating the Accuracy of Power Hardware-in-the-Loop Simulations

Power hardware-in-the-loop (PHIL) simulations need to be accurate to truly reflect the behavior of the systems under test. However, a PHIL simulation may result in errors or even instability due to imperfections (e. g., time delay, noise injection, phase lag, and limited bandwidth) in the power interface, particularly in high-power applications. Additionally, it is usually difficult to determine the accuracy of a simulation because there is no reference available for people to know the "should-be" system responses in advance. Therefore, a method is demanded to predict the accuracy of PHIL simulations. In this paper, an effective method for evaluating the PHIL accuracy is proposed. This method provides a means to justify the result of a PHIL simulation analytically and quantitatively instead of empirically. While the method is based on linear system analysis, it is shown to be also applicable for nonlinear PHIL systems.