An Improved and Efficient Countermeasure against Fault Attacks for AES

被引:0
|
作者
Bedoui, Mouna [1 ]
Mestiri, Hassen [1 ]
Bouallegue, Belgacem [1 ,2 ]
Marzougui, Mehrez [1 ,2 ]
Qayyum, Mohammed [2 ]
Machhout, Mohsen [1 ]
机构
[1] Univ Monastir, Fac Sci Monastir, Elect & Microelect Lab EEL, Monastir, Tunisia
[2] King Khalid Univ, Coll Comp Sci, Abha, Saudi Arabia
关键词
Security; AES; Hardware Implementation; Fault detection; Fault Attacks;
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Cryptographic circuits are used in areas that require confidentiality and a secure information exchange. Thus, these circuits use cryptographic algorithms proven resistant to conventional attacks by certified organizations of the state. For performance reasons, Advanced Encryption Standard (AES) is often physically implemented in cryptographic circuits. This implementation proves make these circuits susceptible to other types of attacks that exploit any kind of information from the system to obtain the secret key. In this paper, the simulation results indicate that error coverage of our proposed countermeasure archive 99.993%. The comparison of our simulation results with those of the previously reported fault detection schemes shown that our proposed scheme have highest frequency overhead.
引用
收藏
页码:209 / 212
页数:4
相关论文
共 50 条
  • [31] An Efficient AES 32-Bit Architecture Resistant to Fault Attacks
    Mestiri, Hassen
    Barraj, Imen
    Mohamed, Abdullah Alsir
    Machhout, Mohsen
    CMC-COMPUTERS MATERIALS & CONTINUA, 2022, 70 (02): : 3667 - 3683
  • [32] A Biased Fault Attack on the Time Redundancy Countermeasure for AES
    Patranabis, Sikhar
    Chakraborty, Abhishek
    Phuong Ha Nguyen
    Mukhopadhyay, Debdeep
    CONSTRUCTIVE SIDE-CHANNEL ANALYSIS AND SECURE DESIGN, COSADE 2015, 2015, 9064 : 189 - 203
  • [33] Design High Security AES with Fault Detection Countermeasure
    Bele, Yashashri V.
    Suryavanshi, Yogesh A.
    2015 INTERNATIONAL CONFERENCE ON COMMUNICATIONS AND SIGNAL PROCESSING (ICCSP), 2015, : 1777 - 1781
  • [34] Analysis of a Code-Based Countermeasure Against Side-Channel and Fault Attacks
    Barbu, Guillaume
    Battistello, Alberto
    INFORMATION SECURITY THEORY AND PRACTICE, WISTP 2016, 2016, 9895 : 153 - 168
  • [35] An Energy-Efficient Neural Network Accelerator with Improved Protections Against Fault-Attacks
    Maji, Saurav
    Lee, Kyungmi
    Cheng Gongye
    Fei, Yunsi
    Chandrakasan, Anantha P.
    IEEE 49TH EUROPEAN SOLID STATE CIRCUITS CONFERENCE, ESSCIRC 2023, 2023, : 233 - 236
  • [36] Deep Learning Side-Channel Attacks against Lightweight SCA Countermeasure RSM-AES
    Fukuda, Yuta
    Yoshida, Kota
    Hashimoto, Hisashi
    Fujino, Takeshi
    PROCEEDINGS OF THE 2021 ASIAN HARDWARE ORIENTED SECURITY AND TRUST SYMPOSIUM (ASIANHOST), 2021,
  • [37] Fault based collision attacks on AES
    Bloemer, Johannes
    Krummel, Volker
    FAULT DIAGNOSIS AND TOLERANCE IN CRYPTOGRAPHY, PROCEEDINGS, 2006, 4236 : 106 - 120
  • [38] Improved Meet-in-the-Middle Preimage Attacks against AES Hashing Modes
    Bao, Zhenzhen
    Ding, Lin
    Guo, Jian
    Wang, Haoyang
    Zhang, Wenying
    IACR TRANSACTIONS ON SYMMETRIC CRYPTOLOGY, 2019, 2019 (04) : 318 - 347
  • [39] An Efficient Countermeasure against Fault Sensitivity Analysis Using Configurable Delay Blocks
    Endo, Sho
    Li, Yang
    Homma, Naofumi
    Sakiyama, Kazuo
    Ohta, Kazuo
    Aoki, Takafumi
    2012 WORKSHOP ON FAULT DIAGNOSIS AND TOLERANCE IN CRYPTOGRAPHY (FDTC), 2012, : 95 - 102
  • [40] An Energy Recovery Logic level Countermeasure for Power Analysis Attacks on AES
    Mahana, P.
    Srinivasan, R.
    Bhaaskaran, V. S. Kanchana
    2013 IEEE INTERNATIONAL CONFERENCE ON SMART STRUCTURES AND SYSTEMS (ICSSS), 2013, : 164 - 170