A Compact Thermal-Via Packaging Design of GaInP/GaAs Collector-Up HBTs in Small High-Power Amplifiers

被引：0

作者：

Lee, P. H. ^{[1
]}

Chou, J. H. ^{[1
]}

Tseng, H. C. ^{[2
]}

机构：

[1] Natl Cheng Kung Univ, Dept Engn Sci, Tainan 70101, Taiwan

[2] Kun Shan Univ, Nanotechnol R&D Ctr, Tainan 71003, Taiwan

来源：

2008 IEEE 20TH INTERNATIONAL CONFERENCE ON INDIUM PHOSPHIDE AND RELATED MATERIALS (IPRM) | 2008年

关键词：

Collector-up heterojunction bipolar transistor (C-up HBT); finite-element modeling (FEM); high-power amplifier (HPA); thermal-via packaging;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We model the thermal performance of the large thermal via which under the collector-up heterojunction bipolar transistor (HBT) by using a finite element method. A compact thermal-via packaging of GaInP/GaAs collector-up HBTs has been designed and calculated. The results indicate that the configuration can be further reduced by 29% to meet the requirement of small high-power amplifiers for cellular-phone communication systems.

引用

页码：388 / +

页数：2

共 40 条

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