On the design of fast, easily testable ALU's

A design methodology for implementing fast, easily testable arithmetic logic units (ALU's) is presented. Here, we describe a set of fast adder designs, which are testable with a test set that has either theta(N) complexity (Lin-testable) or theta(1) complexity (C-testable), where N is the input operand size of the ALU, The various levels of testability are achieved by exploiting some inherent properties of carry-lookahead addition. The Lin-testable and C-testable ALU designs require only one extra input, regardless of the size of the ALU. The area overhead for a high-speed 64-bit Lin-testable ALU is only 0.5%.