FTL Based Carry Look ahead Adder Design Using Floating Gates

The Low-voltage and low-power circuit structures are substantive for almost all mobile electronic gadgets which generally have mixed mode circuit structures embedded with analog sub-sections. Using the reconfigurable logic of multi-input floating gate MOSFETs, 4-bit full adder has been designed for 1.1V operation.[1],[2] Multi -input floating gate (MIFG) transistors have been anticipating in realizing the increased functionality on a chip. A multi -input floating gate MOS transistor accepts multiple inputs signals, calculates the weighted sum of all input signals and then controls the ON and OFF states of the transistor. This enhances the transistor function to more than just switching. Implementing a design using multi -input floating gate MOSFETs brings down transistor count and number of interconnections. Here in this we have presented how to eliminate the propagate and generate signals. This tends the design to become more efficient in area and power consumption by using feed through logic [8]. The following information is about Carry look ahead adder circuit, tested with 45nm technology and is extended to ALU. The proposed circuit has been implemented in 45n-well CMOS technology.