共 50 条
- [2] Boundary-scan test realization based on embedded system ISTM/2009: 8TH INTERNATIONAL SYMPOSIUM ON TEST AND MEASUREMENT, VOLS 1-6, 2009, : 283 - 286
- [5] Socillator test: A delay test scheme for embedded ICs in the boundary-scan environment 19TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 2001, : 158 - 162
- [9] A roadmap for boundary-scan test reuse INTERNATIONAL TEST CONFERENCE 1996, PROCEEDINGS, 1996, : 340 - 346
- [10] DESIGNING FAULT-TOLERANT, TESTABLE, VLSI PROCESSORS USING THE IEEE P1149.1 BOUNDARY-SCAN ARCHITECTURE PROCEEDINGS - IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN : VLSI IN COMPUTERS & PROCESSORS, 1989, : 580 - 584