Plasma-induced Si/SiO2 interface damage in CMOS

Plasma treatments are widely used tools in the microelectronic industry. They may leave some residual passivated damage in the gate oxides at the end, of processing. Using devices with different geometries and antennas, we show that in thin gate oxide (5 nm) devices, the latent plasma-induced damage can be easily detected as interface degradation. We tested this hypothesis using different stress methods (constant voltage stress and step voltage stress), and different characterisation techniques, such as charge pumping, direct current I-V, and sub-threshold slope. Interface damage kinetics and antenna dependencies are discussed. (C) 2002 Elsevier Science B.V. All rights reserved.