A compact Multi-core CPU based adaptive optics real-time controller

被引:3
|
作者
Chen Shanqiu [1 ,2 ]
Zhao Enyi [1 ]
Xu Bing [1 ]
Ye Yutang [2 ]
机构
[1] Chinese Acad Sci, Key Lab Adapt Opt, Inst Opt & Elect, Chengdu 610209, Peoples R China
[2] Univ Elect Sci & Technol China, Sch Optelect Informat, Chengdu 611731, Peoples R China
关键词
Adaptive optics; telescope; real-time controller; multi-core; Linux;
D O I
10.1117/12.2068322
中图分类号
O43 [光学];
学科分类号
070207 ; 0803 ;
摘要
The performance of Adaptive Optics (AO) real-time controller based on Central Processing Unit (CPU) has significantly progressed due to the introduction of the high speed frame-grabber and a 4-cores CPU, which make it possible to process at frequency over 2000 Hz for 4-meter-class telescope and to integrate the real-time task and the user interface program in this compact device. The detailed architecture of this computation system is demonstrated in this paper, and the performance and suitability of this architecture is also discussed by measuring the latency of the controller processing via an adaptive optics emulator system with 16 times 16 and 32 times 32 sub-aperture, and the overall typical processing time is 61 us and 322 us respectively. Test result turns out that it is well suited for the next generation 4-meter-class adaptive optics system and it is possible to process at frequency over 2000 Hz for a 3000-element AO system in 10-meter-class telescope with one board of art-of-the-state computer and a frame-grabber. Comparison with GPU and FPGA based architecture is also discussed in this paper.
引用
收藏
页数:9
相关论文
共 50 条
  • [21] ARCHITECTURAL CONSIDERATIONS FOR CERTIFICATION OF REAL-TIME MULTI-CORE SYSTEMS
    Huyck, Patrick
    [J]. 2013 IEEE/AIAA 32ND DIGITAL AVIONICS SYSTEMS CONFERENCE (DASC), 2013,
  • [22] Predictable Cache Coherence for Multi-Core Real-Time Systems
    Hassan, Mohamed
    Kaushik, Anirudh M.
    Patel, Hiren
    [J]. PROCEEDINGS OF THE 23RD IEEE REAL-TIME AND EMBEDDED TECHNOLOGY AND APPLICATIONS SYMPOSIUM (RTAS 2017), 2017, : 235 - 246
  • [23] Scalable Memory Reclamation for Multi-Core, Real-Time Systems
    Ren, Yuxin
    Liu, Guyue
    Parmer, Gabriel
    Brandenburg, Bjoern
    [J]. 24TH IEEE REAL-TIME AND EMBEDDED TECHNOLOGY AND APPLICATIONS SYMPOSIUM (RTAS 2018), 2018, : 152 - 163
  • [24] Real-time Detection of Traffic Signs on a Multi-Core Processor
    Ach, R.
    Luth, N.
    Techmer, A.
    [J]. 2008 IEEE INTELLIGENT VEHICLES SYMPOSIUM, VOLS 1-3, 2008, : 516 - +
  • [25] Power Aware Scheduling on Real-time Multi-core Systems
    Hanamakkanavar, Amit
    Handur, Vidya
    Kareti, Venkatesh
    Ranadive, Priti
    [J]. 2016 INTERNATIONAL CONFERENCE ON ADVANCES IN COMPUTING, COMMUNICATIONS AND INFORMATICS (ICACCI), 2016, : 2624 - 2628
  • [26] A hybrid real-time scheduling approach on multi-core architectures
    Tan, Pengliu
    Shu, Jian
    Wu, Zhenhua
    [J]. Journal of Software, 2010, 5 (09) : 958 - 965
  • [27] Technology of multi-core Real-Time virtual instrumentation programming
    Bilski, Piotr
    Winiecki, Wieslaw
    [J]. PRZEGLAD ELEKTROTECHNICZNY, 2008, 84 (05): : 269 - 272
  • [28] A new real-time scheduling model for multi-core platform
    [J]. Huang, S. (hhsjj@nwpu.edu.cn), 1600, Huazhong University of Science and Technology (41):
  • [29] Scheduling Parallel Real-Time Tasks on Multi-core Processors
    Lakshmanan, Karthik
    Kato, Shinpei
    Rajkumar, Ragunathan
    [J]. 31ST IEEE REAL-TIME SYSTEMS SYMPOSIUM (RTSS 2010), 2010, : 259 - 268
  • [30] Classification of Traffic Signs in Real-Time on a Multi-Core Processor
    Ach, R.
    Luth, N.
    Schinner, T.
    Techmer, A.
    Walther, S.
    [J]. 2008 IEEE INTELLIGENT VEHICLES SYMPOSIUM, VOLS 1-3, 2008, : 492 - 497