Comparison of High Level FPGA Hardware Design for Solving Tri-Diagonal Linear Systems

被引:9
|
作者
Warne, David J. [1 ]
Kelson, Neil A. [1 ,2 ]
Hayward, Ross F. [3 ]
机构
[1] Queensland Univ Technol, Brisbane, Qld 4001, Australia
[2] Queensland Univ Technol, High Performance Comp & Res Support, Brisbane, Qld, Australia
[3] Queensland Univ Technol, Sch Elect Engn & Comp Sci, Brisbane, Qld, Australia
来源
2014 INTERNATIONAL CONFERENCE ON COMPUTATIONAL SCIENCE | 2014年 / 29卷
关键词
Reconfigurable Computing; Field Programmable Gate Arrays; High Level Synthesis; Open Computing Language; Numerical Linear Algebra; Tri-diagonal Linear Systems;
D O I
10.1016/j.procs.2014.05.009
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Reconfigurable computing devices can increase the performance of compute intensive algorithms by implementing application specific co-processor architectures. The power cost for this performance gain is often an order of magnitude less than that of modern CPUs and GPUs. Exploiting the potential of reconfigurable devices such as Field-Programmable Gate Arrays (FPGAs) is typically a complex and tedious hardware engineering task. Recently the major FPGA vendors (Altera, and Xilinx) have released their own high-level design tools, which have great potential for rapid development of FPGA based custom accelerators. In this paper, we will evaluate Altera's OpenCL Software Development Kit, and Xilinx's Vivado High Level Sythesis tool. These tools will be compared for their performance, logic utilisation, and ease of development for the test case of a tri-diagonal linear system solver.
引用
收藏
页码:95 / 101
页数:7
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