Serial low power bus coding for VLSI

被引:3
|
作者
Kuo, Chih-Hung [1 ]
Wu, Wey-Bang [1 ]
Wu, Yi-Jang [1 ]
Lin, Jia-Hung [1 ]
机构
[1] Natl Cheng Kung Univ, Dept Elect Engn, 1 Univ Rd, Tainan 70101, Taiwan
关键词
D O I
10.1109/ICCCAS.2006.285171
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
In this paper, we present a serial coding method to reduce the bus transition activity and implement error control code to reduce bit error probability. We propose two kinds of coding method for data bus. The basic principle is to append extra information pattern to the back of the original data packet. Experimental results show that the proposed coding scheme can reduce total bus transitions by 12% on the average, compared to that of the uncoded patterns, without adding redundant bitlines on the bus.
引用
收藏
页码:2449 / 2453
页数:5
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