共 50 条
- [1] A Thin Adhesive for 3D/2.5D Si Chip Stacking at Low Temperature IITC2021: 2021 IEEE INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE (IITC), 2021,
- [2] Foundry Perspectives on 2.5D/3D Integration and Roadmap 2021 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM), 2021,
- [3] Novel TSV Process Technologies for 2.5D/3D Packaging 2014 IEEE 64TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2014, : 1697 - 1699
- [4] Automated Inspection and Metrology for 2.5D and 3D/TSV Process Assurance 2014 IEEE 64TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2014, : 1606 - 1609
- [5] Imitation chip design based on TSV 2.5D package 2015 16TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY, 2015,
- [6] Cu/Sn Microbumps Interconnect for 3D TSV Chip Stacking 2010 PROCEEDINGS 60TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2010, : 858 - 863
- [8] Low COO PVD solutions addressing 2.5D and 3D TSV packaging challenges. 2012 35TH IEEE/CPMT INTERNATIONAL ELECTRONICS MANUFACTURING TECHNOLOGY SYMPOSIUM (IEMT), 2012,
- [9] TSV Technology for 2.5D IC Solution 2012 IEEE 62ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2012, : 284 - 288
- [10] Material Technology for 2.5D/3D Package IEEE CPMT SYMPOSIUM JAPAN 2015, (ICSJ 2015), 2015, : 101 - 104