Improving the accuracy of support-set finding method for power estimation of combinational circuits

被引:1
|
作者
Choi, H
Hwang, SH
机构
关键词
D O I
10.1109/EDTC.1997.582411
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
We address a way to improve the accuracy of support-set finding method for a probability-based power estimation of combinational circuits. Support-set finding methods to build local BDDs have been proposed to handle large circuits. However, because they consider only the shallow reconvergence, they are not accurate enough to be used in the power optimization. To solve this problem, we propose a new algorithm, Feather algorithm, which can efficiently detect minimal support-set with 100% reconvergent node detection rate. The experimental results show that the average error of our proposed method is 0.1% for the total power and 1.6% for the node-specific power.
引用
收藏
页码:526 / 530
页数:5
相关论文
共 50 条
  • [1] A new method for power estimation and optimization of combinational circuits
    Aldeen, Ahmed Sammy
    Al-Asaad, Hussain
    [J]. 2007 INTERNATIONAL CONFERENCE ON MICROELECTRONICS, 2007, : 198 - +
  • [2] An Efficient SER Estimation Method for Combinational Circuits
    Kehl, Natalja
    Rosenstiel, Wolfgang
    [J]. IEEE TRANSACTIONS ON RELIABILITY, 2011, 60 (04) : 742 - 747
  • [3] Runtime leakage power estimation technique for combinational circuits
    Lin, Yu-Shiang
    Sylvester, Dennis
    [J]. PROCEEDINGS OF THE ASP-DAC 2007, 2007, : 660 - +
  • [4] An Effective Fanout-Based Method for Improving Error Propagation Probability Estimation in Combinational Circuits
    Esmaieli, Esfandiar
    Peiravi, Ali
    Sedaghat, Yasser
    [J]. IEEE ACCESS, 2024, 12 : 35172 - 35183
  • [5] A transition entropy area estimation method for combinational circuits
    Zhang, S
    Wang, NL
    Zhou, R
    [J]. 2003 5TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2003, : 63 - 66
  • [6] A Hybrid Method for Signal Probability Estimation with Combinational Circuits
    Chen, Chunhong
    Zhan, Suoyue
    [J]. 2022 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, APCCAS, 2022, : 472 - 475
  • [7] Analytical models for RTL power estimation of combinational and sequential circuits
    Gupta, S
    Najm, FN
    [J]. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2000, 19 (07) : 808 - 814
  • [8] Generation of high power test vector set for combinational VLSI circuits
    Tharakan, KTO
    Rao, SSSP
    [J]. DEFENCE SCIENCE JOURNAL, 2002, 52 (04) : 351 - 356
  • [9] A hybrid method for signal probability and reliability estimation with combinational circuits
    Zhan, Suoyue
    Chen, Chunhong
    [J]. INTEGRATION-THE VLSI JOURNAL, 2022, 87 : 275 - 283
  • [10] Maximum power-up current estimation in combinational CMOS circuits
    Sagahyroon, Assim
    Aloul, Fadi
    [J]. CIRCUITS AND SYSTEMS FOR SIGNAL PROCESSING , INFORMATION AND COMMUNICATION TECHNOLOGIES, AND POWER SOURCES AND SYSTEMS, VOL 1 AND 2, PROCEEDINGS, 2006, : 70 - 73