Device characteristics of MOSFETs with self-aligned punch-through stopper structure

Self-aligned punch-through stopper (SPS) MOSFETs are made using high energy ion implantation; punch-through stopper (PTS) layers are formed after gate electrode delineation. The SPS structure features: 1) a retrograded PTS layer with a gradually increasing impurity profile; and 2) a relatively lower impurity concentration around the source and drain region. These characteristics of the PTS structure permit both junction capacitance reduction and adjustment of threshold voltage (V-th) (specifically, a reduced V-th and suppressed reverse short-channel effect) and improved current drivability, short-channel characteristics, and hot-carrier immunity. The proposed structure is also effective in reducing process steps because only one implantation is needed to adjust the profile.