Measurements of gate-oxide interface roughness in strained-Si virtual substrate SiGe/Si MOSFET device structures

被引：0

作者：

Norris, DJ

Cullis, AG

Olsen, SH

O'Neill, AG

Zhang, J

机构：

[1] Univ Sheffield, Dept Elect & Elect Engn, Sheffield S1 3JD, S Yorkshire, England

[2] Univ Newcastle Upon Tyne, Sch Elect Elect & Comp Engn, Newcastle Upon Tyne NE1 7RU, Tyne & Wear, England

[3] Univ London Imperial Coll Sci Technol & Med, Ctr Elect Mat & Devices, Dept Phys, London SW7 2BW, England

来源：

MICROSCOPY OF SEMICONDUCTING MATERIALS 2003 | 2003年 / 180期

关键词：

D O I：

暂无

中图分类号：

TB3 [工程材料学];

学科分类号：

0805 ; 080502 ;

摘要：

A series of SiGe/Si virtual substrate based n-channel Si MOSFETs have been analysed using transmission electron microscopy (TEM). The focal point of this work is to investigate the effect of gate oxidation upon an undulating virtual substrate surface. We find that cross-sectional TEM images of devices processed on such a wafer show a significant difference in the amplitude of gate-oxide interface roughness at the sloping edges of substrate surface. Moreover, such nanoscale roughening correlates to the variable vicinal nature of the undulating SiGe substrate surface. Methods for quantitative measurement of the roughness are presented.

引用

页码：389 / 392

页数：4

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