A Dual Material Double-Layer Gate Stack Junctionless Transistor for Enhanced Analog Performance

被引：0
|
作者：
Baruah, Ratul Kumar [1 ]
Paily, Roy P. [1 ]
机构：
[1] Indian Inst Technol Guwahati, Dept Elect & Elect Engn, Gauhati, Assam, India
来源：
VLSI DESIGN AND TEST, VDAT 2013 | 2013年 / 382卷
关键词：
Double-gate junctionless transistor (DGJLT); dual material double-layer gate stack (DM-DGS); intrinsic gain; unity gain frequency; workfunction; SON MOSFET; ARCHITECTURE; IMPACT;
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
In this paper, we present a simulation study of analog circuit performance parameters of a dual material double-layer gate stack (high-k/SiO2) (DM-DGS) symmetric double-gate junctionless transistor (DGJLT). The characteristics are demonstrated and compared with dual material gate (DMG) DGJLT and single material (conventional) gate (SMG) DGJLT. DMG DGJLT present superior transconductance (G(m)), early voltage (V-EA) and intrinsic gain (G(m)R(O)) compared to SMG DGJLT. These parameters are further improved for DM-DGS DGJLT and it can be attributed to their better gate control on the channel region.
引用
收藏
页码：118 / 127
页数：10
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