A Low-Power, Ultra Low-Offset, 16.5-bit, ΣΔ ADC for Coulomb Counting and Fuel Gauge Applications

被引:0
|
作者
Ceballos, Jose Luis [1 ]
Reindl, Christian [1 ]
机构
[1] Infineon Technol Austria AG, Villach, Austria
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A converter macro is presented. It has been used as part of a current-to-digital converter and as part of the voltage measurement unit for battery charge control. It uses a split decimation filter, which improves the resulting SNR when system level chopping is performed. Fabricated in a 130nm CMOS process it consumes only 30 mu A/24 mu A (with or w/o reference buffer) from a 1.35V source. Specially tailored to be connected to low impedance sources, it accepts small input signals with a linear range (-3dB(FS)) in the order of 100mV(peak) It has an SNDR > 97dB @ -3dB(FS) in a 1Hz BW, a low-frequency CMRR > 100dB due to double sampling, and a low-frequency PSR > 80dB(FS) for a 20mV(peak) supply disturbance (operating at maximum input level). The chopping results in an average offset in the order of 200nV.
引用
收藏
页码:817 / 820
页数:4
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