共 50 条
- [32] Design and Implementation of a Polynomial Basis Multiplier Architecture Over GF(2m) JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2014, 75 (03): : 203 - 208
- [33] Design and Implementation of a Sequential Polynomial Basis Multiplier over GF(2m) KSII TRANSACTIONS ON INTERNET AND INFORMATION SYSTEMS, 2017, 11 (05): : 2680 - 2700
- [34] Design and Implementation of a Polynomial Basis Multiplier Architecture Over GF(2m) Journal of Signal Processing Systems, 2014, 75 : 203 - 208
- [36] Bit-parallel systolic modular multipliers for a class of GF(2m) ARITH-15 2001: 15TH SYMPOSIUM ON COMPUTER ARITHMETIC, PROCEEDINGS, 2001, : 51 - 58
- [37] A Survey of GF (2m) Multipliers on FPGA 2014 9TH INTERNATIONAL DESIGN & TEST SYMPOSIUM (IDT), 2014, : 215 - 218
- [40] A fast inversion algorithm and low-complexity architecture over GF(2m) COMPUTATIONAL INTELLIGENCE AND SECURITY, PT 2, PROCEEDINGS, 2005, 3802 : 1 - +