Motion estimation architecture for MPEG-4

被引:0
|
作者
Chandrasekhar, L [1 ]
Panchanathan, S [1 ]
机构
[1] Arizona State Univ, Dept Elect Engn, Visual Comp & Commun Lab, Tempe, AZ 85287 USA
关键词
MPEG-4; motion estimation; padding; hardware implementation;
D O I
10.1117/12.365901
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Visual Computing and Communications is becoming increasingly important with the advent of broadband networks and compression standards. The International Standards Organization (ISO) is currently finalizing the MPEG-4 standard, which emphasizes object based coding and content manipulation in video sequences. There are essentially two kinds of redundancies in a video sequence, namely spatial and temporal. The concept of video object planes (VOPs) has been introduced in MPEG-4, which allows for manipulation and coding of the various video objects. The temporal correlation in the VOPs is exploited by employing motion estimation/compensation process similar to the MPEG-1 and MPEG-2 standards. However, there are some enhancements to that of the MPEG-4 motion estimation procedure particularly in terms of the padding. Motion estimation process is applied to block sizes for both 8x8 and 16x16 pixels for the luminance component. In this paper, we propose design of flexible architectures for implementing scalable motion estimation and padding. The proposed architecture is modular and has a regular data now and therefore can be implemented in VLSI.
引用
收藏
页码:14 / 25
页数:12
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