Possibilities and limitations of I-DDQ Testing in submicron CMOS

被引：8
|
作者：
Figueras, J
机构：
来源：
SECOND ANNUAL IEEE INTERNATIONAL CONFERENCE ON INNOVATIVE SYSTEMS IN SILICON, 1997 PROCEEDINGS | 1997年
关键词：
D O I：
10.1109/ICISS.1997.630258
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
I-DDQ Testing is a well accepted testing approach based on the observation of the quiescent current consumption. Its growing industrial implementation is based on the possibility of detecting defects which scape other more traditional testing methods. However, its application costs are higher and its effectiveness in deep submicron technologies may decrease if the current trend of leakage increase is not stopped by creative innovation.
引用
收藏
页码：174 / 185
页数：12
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