Design and Implementation of a Field Programmable CRC Circuit Architecture

被引：18

作者：

Toal, Ciaran ^{[1
]}

McLaughlin, Kieran ^{[1
]}

Sezer, Sakir ^{[1
]}

Yang, Xin ^{[1
]}

机构：

[1] Queens Univ Belfast, ECIT, Belfast BT3 9DT, Antrim, North Ireland

来源：

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | 2009年 / 17卷 / 08期

基金：

英国工程与自然科学研究理事会;

关键词：

Cyclic redundancy check (CRC); error detection; field programmable; network processing; reconfigurable;

D O I：

10.1109/TVLSI.2008.2008741

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The design and implementation of a programmable cyclic redundancy check (CRC) computation circuit architecture, suitable for deployment in network related system-on-chips (SoCs) is presented. The architecture has been designed to be field reprogrammable so that it is fully flexible in terms of the polynomial deployed and the input port width. The circuit includes an embedded configuration controller that has a low reconfiguration time and hardware cost. The circuit has been synthesised and mapped to 130-nm UMC standard cell [application-specific integrated circuit (ASIC)] technology and is capable of supporting line speeds of 5 Gb/s.

引用

页码：1142 / 1147

页数：6

共 50 条

[11] Low-Cost and Programmable CRC Implementation Based on FPGA
Liu, Huan
Qiu, Zhiliang
Pan, Weitao
Li, Jun
Zheng, Ling
Gao, Ya
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2021, 68 (01) : 211 - 215
[12] Design and implementation of a delay-optimized universal programmable routing circuit for FPGAs
Wu Fang
Zhang Huowen
Lai Jinmei
Wang Yuan
Chen Liguang
Duan Lei
Tong Jiarong
JOURNAL OF SEMICONDUCTORS, 2009, 30 (06)
[13] LSI IMPLEMENTATION OF AN INTELLIGENT CRC COMPUTER AND PROGRAMMABLE CHARACTER COMPARATOR
WEISSBERGER, AJ
IEEE TRANSACTIONS ON COMPUTERS, 1980, 29 (02) : 116 - 124
[14] Design and implementation of a delay-optimized universal programmable routing circuit for FPGAs
吴方
张火文
来金梅
王元
陈利光
段磊
童家榕
半导体学报, 2009, 30 (06) : 132 - 137
[15] Low-Cost and Programmable CRC Implementation Based on FPGA
State Key Laboratory of Integrated Service Networks, Xidian University, Xi'an
710071, China
不详
710100, China
不详
710121, China
不详
214121, China
IEEE Trans. Circuits Syst. Express Briefs, 1 (211-215):
[16] LSI IMPLEMENTATION OF AN INTELLIGENT CRC COMPUTER AND PROGRAMMABLE CHARACTER COMPARATOR
WEISSBERGER, AJ
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1980, 15 (01) : 52 - 60
[17] Partially Programmable Circuit Design
Matrosova, A.
Ostanin, S.
Kirienko, I.
Singh, V.
2014 IEEE EAST-WEST DESIGN & TEST SYMPOSIUM (EWDTS), 2014,
[18] Programmable protein circuit design
Chen, Zibo
Elowitz, Michael B.
CELL, 2021, 184 (09) : 2284 - 2301
[19] Field Programmable Gate Arrays Implementation of Multiplier Free Architecture for Image Compression
Vijay, Parvatham
Gopalakrishnan, Seetharaman
ADVANCED SCIENCE LETTERS, 2014, 20 (10-12) : 2050 - 2054
[20] Computational field programmable architecture
Kaviani, A
Vranesic, D
Brown, S
IEEE 1998 CUSTOM INTEGRATED CIRCUITS CONFERENCE - PROCEEDINGS, 1998, : 261 - 264

← 1 2 3 4 5 →